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AgeCommit message (Expand)Author
2018-04-13ruby: bugfix for MESI_Three_Level protocolBrandon Potter
2018-04-13mem-ruby: fix more style issues in AMD licensesTony Gutierrez
2018-04-13mem-cache: Add MoveToTail to FALRUDaniel R. Carvalho
2018-04-12configs, mem-ruby: fix issues with style in AMD licenseTony Gutierrez
2018-04-10arch-arm: Fix mrc,mcr to cop14 disassembleGiacomo Travaglini
2018-04-10dev: arm: SetScaling commands don't send parameter bytes.Gabe Black
2018-04-06arch: alpha: Fix an 8 year old bug from the transition to pc objects.Gabe Black
2018-04-06arch-arm: Add support for Tarmac trace generationGiacomo Travaglini
2018-04-06arch-arm: Add support for Tarmac trace-based simulationGiacomo Travaglini
2018-04-06arch-arm: Fix AArch32 branch instructions disassembleGiacomo Travaglini
2018-04-06arch-arm: Fix secure write of SCTLR when EL3 is AArch64Giacomo Travaglini
2018-04-06arch-arm: Correct mcrr,mrrc disassembleGiacomo Travaglini
2018-04-06mem: Remove unused 'using namespace'Daniel R. Carvalho
2018-04-06mem-cache: Move insertBlock functionality in FALRUDaniel R. Carvalho
2018-04-06mem-cache: Create LIP Replacement PolicyDaniel R. Carvalho
2018-04-06mem-cache: Create BIP Replacement PolicyDaniel R. Carvalho
2018-04-05mem-cache: Use Packet functions to write data blocksDaniel R. Carvalho
2018-04-05dev: Make sure the EtherTap device uses the right event queue.Gabe Black
2018-03-30base: Make bitunion output functions static/inline.Gabe Black
2018-03-30mem-cache: Remove unused return value from the recvTimingReq funcNikos Nikoleris
2018-03-30mem-cache: Fix FALRU data block seg faultDaniel R. Carvalho
2018-03-30mem-cache: Create LFU replacement policyDaniel R. Carvalho
2018-03-30mem-cache: Create RRIP Replacement PolicyDaniel R. Carvalho
2018-03-30mem-cache: Create BRRIP replacement policyDaniel R. Carvalho
2018-03-28base: Add a default output function for bitunion types.Gabe Black
2018-03-27dev: sparc: Get rid of the TheISA namespace in the SPARC devices.Gabe Black
2018-03-27dev: Remove a bunch of Alpha code from MIPS, and unnecessary TheISAs.Gabe Black
2018-03-27cpu: Remove ExtMachInst typedefs from the O3 CPU model.Gabe Black
2018-03-27arch: cpu: Make the ExtMachInst type a template argument in InstMap.Gabe Black
2018-03-27sparc: Add some missing M5_FALLTHROUGHs and breaks.Gabe Black
2018-03-27cpu: Stop extracting inst_flags from the machInst.Gabe Black
2018-03-26cpu: Proposed fix for backwards compatibility in proto/inst.proto.Gabe Black
2018-03-26arch: Fix all override related warnings.Gabe Black
2018-03-26cpu: Use the new asBytes function in the protobuf inst tracer.Gabe Black
2018-03-26arch: Add a virtual asBytes function to the StaticInst class.Gabe Black
2018-03-23mem-cache: fix missing overrides in repl policiesJason Lowe-Power
2018-03-23ruby: Make sure addresses print in hexJason Lowe-Power
2018-03-23learning_gem5: Add a simple Ruby protocolJason Lowe-Power
2018-03-23mem-cache: Create FIFO replacement policyDaniel R. Carvalho
2018-03-23mem-cache: Fix MRU rebaseDaniel R. Carvalho
2018-03-23arch-arm: Distinguish IS TLBI from non-ISGiacomo Travaglini
2018-03-23arch-arm: Created function for TLB ASID InvalidationGiacomo Travaglini
2018-03-22hsail: Get rid of an inert private member of StorageSpace.Gabe Black
2018-03-22cpu: Make the protobuf inst tracer accept variable sized instructions.Gabe Black
2018-03-22mem-cache: Create MRU replacement policyDaniel R. Carvalho
2018-03-22mem-cache: Split array indexing and replacement policies.Daniel R. Carvalho
2018-03-21mem-cache: Allow clean operations when block allocation failsNikos Nikoleris
2018-03-20arch-arm, configs: Treat the bootloader rom as cacheable memoryNikos Nikoleris
2018-03-20arch, arm: Fix implicit-fallthrough GCC warningsChun-Chen Hsu
2018-03-20riscv: throw IllegalInstFault when decoding invalid instructionsTuan Ta
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