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AgeCommit message (Expand)Author
2008-10-23remove the totally obsolete split cacheLisa Hsu
2008-10-21style: Use the correct m5 style for things relating to interrupts.Nathan Binkert
2008-10-20O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Remo...Ali Saidi
2008-10-19Automated merge with ssh://daystrom.m5sim.org//z/repo/m5Lisa Hsu
2008-10-16need to add packet_access.hh in order to get tempalte definitionNathan Binkert
2008-10-16get rid of local variable that's only used in an assert so fast compilesNathan Binkert
2008-10-16Automated merge with ssh://daystrom.m5sim.org//z/repo/m5Lisa Hsu
2008-10-14This function declaration isn't used anywhere.Lisa Hsu
2008-10-14eventq: make python events actually workNathan Binkert
2008-10-14eventq: revert code for unserializing events.Nathan Binkert
2008-10-12CPU: Explain why some code is commented out.Gabe Black
2008-10-12Get rid of some commented out code.Gabe Black
2008-10-12X86: Set the delayed commit flag in x86 microops appropriately.Gabe Black
2008-10-12X86: Make the local APIC timer event generate an interrupt.Gabe Black
2008-10-12X86: Implement the EOI register in the local APIC.Gabe Black
2008-10-12X86: Add some DPRINTFs to the local APIC.Gabe Black
2008-10-12X86: Make auto eoi mode work in the I8259 PIC.Gabe Black
2008-10-12X86: Make non-specific EOI commands work.Gabe Black
2008-10-12X86: Make the I8259 PIC accept a specific EOI command.Gabe Black
2008-10-12X86: Fix the segment setting code in IRET, and make it restore the flags.Gabe Black
2008-10-12X86: Panic when an unimplemented fault is invoked, rather than spinning foreverGabe Black
2008-10-12X86: Implement the swapgs instruction.Gabe Black
2008-10-12X86: Add wrval/rdval microops for reading significant miscregs.Gabe Black
2008-10-12X86: Make the x86 interrupt fault kick off the interrupt microcode.Gabe Black
2008-10-12X86: Implement entering an interrupt in microcode.Gabe Black
2008-10-12X86: Make sure register microops set fault rather than returning one.Gabe Black
2008-10-12X86: Implement an wrdh microop which loads bases/offsets from 16 byte descrip...Gabe Black
2008-10-12X86: Make the MicroPC type 16 bit.Gabe Black
2008-10-12X86: Implement local labels for the ROM that actually refer into the ROM.Gabe Black
2008-10-12X86: Implement the chks check of interrupt gate target code segments.Gabe Black
2008-10-12X86: Add a check type for interrupt gates.Gabe Black
2008-10-12X86: Fix chks checking the submode for stack segments.Gabe Black
2008-10-12X86: Let segment manipulation microops be conditional.Gabe Black
2008-10-12X86: Let the microassembler know about the microcode only H segment.Gabe Black
2008-10-12X86: Fix the rdbase microopGabe Black
2008-10-12X86: Don't fetch in the simple CPU if you're in the ROM.Gabe Black
2008-10-12Get rid of old RegContext code.Gabe Black
2008-10-12X86: Create a handy way to access labels from the ROM in microcode.Gabe Black
2008-10-12X86: Make X86's microcode ROM actually do something.Gabe Black
2008-10-12CPU: Make the highest order bit in the micro pc determine if it's combination...Gabe Black
2008-10-12CPU: Create a microcode ROM object in the CPU which is defined by the ISA.Gabe Black
2008-10-12X86: Create an eret microop which returns from ROM to combinational decoding.Gabe Black
2008-10-12X86: Make Br never report itself as the last microop.Gabe Black
2008-10-12X86: Create a SeqOp class of microops and make Br one of them.Gabe Black
2008-10-12X86: Implement CPUID with a magical function instead of microcode.Gabe Black
2008-10-12X86: Fix the ordering of special physical address ranges.Gabe Black
2008-10-12X86: Create a mechanism for the IO APIC to access I8259 vectors.Gabe Black
2008-10-12X86: Actually use the extra vector bits we get from ICW2.Gabe Black
2008-10-12X86: Make the local APIC process interrupts and send them to the CPU.Gabe Black
2008-10-12X86: Make the local APIC handle interrupt messages from the IO APIC.Gabe Black
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