| Age | Commit message (Expand) | Author |
|---|
| 2008-11-10 | mem: update stuff for changes to Packet and Request | Nathan Binkert |
| 2008-11-10 | style: clean up the Packet stuff | Nathan Binkert |
| 2008-11-10 | flags: Provide an object for managing boolean flags for an object. | Nathan Binkert |
| 2008-11-10 | safe_cast: add a new cast function for casts that should always succeed. | Nathan Binkert |
| 2008-11-10 | DmaDevice: fix minor type in error message. | Steve Reinhardt |
| 2008-11-10 | mem: Assert that requests have non-negative size. | Steve Reinhardt |
| 2008-11-10 | Cache: Refactor packet forwarding a bit. | Steve Reinhardt |
| 2008-11-09 | CPU: Make unaligned accesses work in the timing simple CPU. | Gabe Black |
| 2008-11-09 | X86: Fix completeAcc get call. | Gabe Black |
| 2008-11-09 | X86: Make the timing simple CPU handle variable length instructions. | Gabe Black |
| 2008-11-05 | Fix a few more places where the context stuff wasn't changed | Nathan Binkert |
| 2008-11-05 | Fix SPARC_FS compile | Lisa Hsu |
| 2008-11-05 | Right now a single thread cpu 1 could get assigned context Id != 1, depending | Lisa Hsu |
| 2008-11-04 | decouple eviction from insertion in the cache. | Lisa Hsu |
| 2008-11-04 | Change the findBlock(addr, lat) to accessBlock, which I think has better conn... | Lisa Hsu |
| 2008-11-04 | get rid of all instances of readTid() and getThreadNum(). Unify and eliminate | Lisa Hsu |
| 2008-11-02 | Add in Context IDs to the simulator. From now on, cpuId is almost never used, | Lisa Hsu |
| 2008-11-02 | Make it so that all thread contexts are registered with the System, even in | Lisa Hsu |
| 2008-11-02 | make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered | Lisa Hsu |
| 2008-10-27 | CPU: The API change to EventWrapper did not get propagated to the entirety o... | Clint Smullen |
| 2008-10-27 | Checkpointing: createCountedDrain function, it was only returning an Event, w... | Clint Smullen |
| 2008-10-23 | s/cpu_id/cpuId in o3 (to be consistent and match style), also fix some typos in | Lisa Hsu |
| 2008-10-23 | probe function no longer used anywhere. | Lisa Hsu |
| 2008-10-23 | remove the totally obsolete split cache | Lisa Hsu |
| 2008-10-21 | style: Use the correct m5 style for things relating to interrupts. | Nathan Binkert |
| 2008-10-20 | O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Remo... | Ali Saidi |
| 2008-10-19 | Automated merge with ssh://daystrom.m5sim.org//z/repo/m5 | Lisa Hsu |
| 2008-10-16 | need to add packet_access.hh in order to get tempalte definition | Nathan Binkert |
| 2008-10-16 | get rid of local variable that's only used in an assert so fast compiles | Nathan Binkert |
| 2008-10-16 | Automated merge with ssh://daystrom.m5sim.org//z/repo/m5 | Lisa Hsu |
| 2008-10-14 | This function declaration isn't used anywhere. | Lisa Hsu |
| 2008-10-14 | eventq: make python events actually work | Nathan Binkert |
| 2008-10-14 | eventq: revert code for unserializing events. | Nathan Binkert |
| 2008-10-12 | CPU: Explain why some code is commented out. | Gabe Black |
| 2008-10-12 | Get rid of some commented out code. | Gabe Black |
| 2008-10-12 | X86: Set the delayed commit flag in x86 microops appropriately. | Gabe Black |
| 2008-10-12 | X86: Make the local APIC timer event generate an interrupt. | Gabe Black |
| 2008-10-12 | X86: Implement the EOI register in the local APIC. | Gabe Black |
| 2008-10-12 | X86: Add some DPRINTFs to the local APIC. | Gabe Black |
| 2008-10-12 | X86: Make auto eoi mode work in the I8259 PIC. | Gabe Black |
| 2008-10-12 | X86: Make non-specific EOI commands work. | Gabe Black |
| 2008-10-12 | X86: Make the I8259 PIC accept a specific EOI command. | Gabe Black |
| 2008-10-12 | X86: Fix the segment setting code in IRET, and make it restore the flags. | Gabe Black |
| 2008-10-12 | X86: Panic when an unimplemented fault is invoked, rather than spinning forever | Gabe Black |
| 2008-10-12 | X86: Implement the swapgs instruction. | Gabe Black |
| 2008-10-12 | X86: Add wrval/rdval microops for reading significant miscregs. | Gabe Black |
| 2008-10-12 | X86: Make the x86 interrupt fault kick off the interrupt microcode. | Gabe Black |
| 2008-10-12 | X86: Implement entering an interrupt in microcode. | Gabe Black |
| 2008-10-12 | X86: Make sure register microops set fault rather than returning one. | Gabe Black |
| 2008-10-12 | X86: Implement an wrdh microop which loads bases/offsets from 16 byte descrip... | Gabe Black |
