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Age
Commit message (
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Author
2015-04-22
cpu: remove conditional check (count > 0) on o3 IQ squashes
Brandon Potter
2015-04-22
syscall_emul: implement clock_gettime system call
Brandon Potter
2015-04-22
syscall_emul: update x86 syscall table
Monir Mozumder
2015-04-22
syscall_emul: update getrlimit to use warn
Brandon Potter
2015-04-22
syscall_emul: fix warning with wrong syscall name
Brandon Potter
2015-04-22
base: add new ChunkGenerator method to identify last chunk
Brandon Potter
2015-04-20
cpu: Remove the InOrderCPU from the tree
Andreas Hansson
2015-04-14
config, cpu: fix progress interval for switched CPUs
Malek Musleh
2015-04-13
cpu: re-organizes the branch predictor structure.
Dibakar Gope
2015-04-13
x86: implements x87 mult/div instructions
Nilay Vaish
2015-04-13
ruby: allow restoring from checkpoint when using DRAMCtrl
Lena Olson
2015-04-13
sim: Use NULL instead of None for testing filenames.
Nilay Vaish
2015-04-13
sim: fix function for emulating dup()
Nilay Vaish
2015-04-08
config: Support full-system with SST's memory system
Curtis Dunham
2015-04-03
dev: (un)serialize fix for the RTC and RTC Timer Interrupt events
Nikos Nikoleris
2015-04-03
sim: correct check for endianess
Ruslan Bukin
2015-04-03
dev: Extend access width for IDE control registers
Ruslan Bukin
2015-04-03
cpu: fix system total instructions accounting
Nikos Nikoleris
2015-04-03
x86: fix debug trace output for mwait
Lena Olson
2015-03-27
mem: Support any number of master-IDs in stride prefetcher
Stephan Diestelhorst
2015-03-27
mem: Allocate cache writebacks before new MSHRs
Andreas Hansson
2015-03-27
mem: Cleanup flow for uncacheable accesses
Andreas Hansson
2015-03-27
mem: Ignore uncacheable MSHRs when finding matches
Andreas Hansson
2015-03-27
mem: Remove redundant allocateUncachedReadBuffer in cache
Andreas Hansson
2015-03-27
mem: Modernise MSHR iterators to C++11
Andreas Hansson
2015-03-27
mem: Align all MSHR entries to block boundaries
Andreas Hansson
2015-03-27
mem: Rename PREFETCH_SNOOP_SQUASH flag to BLOCK_CACHED
Ali Jafri
2015-03-26
sim: Update limit_event reuse to final version
Curtis Dunham
2015-03-26
cpu: Fix InstPBTrace inheritance
Andreas Hansson
2015-03-23
mem: rename Locked/LOCKED to LockedRMW/LOCKED_RMW
Steve Reinhardt
2015-03-23
misc: quote args in echoed command line
Steve Reinhardt
2015-03-23
sim: Reuse the same limit_event in simulate()
Curtis Dunham
2015-03-23
mem: Tidy up Request
Andreas Hansson
2015-03-19
arm: Add a GICv2m device
Matt Evans
2015-03-19
arm: Remove the 'magic MSI register' in the GIC (PL390)
Matt Evans
2015-03-19
cpu: Fix TrafficGen message format
Wendy Elsasser
2015-03-19
mem: Use emplace front/back for deferred packets
Andreas Hansson
2015-03-19
mem: Enable CommMonitor to output traces in atomic mode
Geoffrey Blake
2015-02-11
mem: remove redundant test in in Cache::recvTimingResp()
Steve Reinhardt
2015-02-11
mem: add local var in Cache::recvTimingResp()
Steve Reinhardt
2015-02-11
mem: restructure Packet cmd initialization a bit more
Steve Reinhardt
2015-03-14
mem: clean up write buffer check in Cache::handleSnoop()
Steve Reinhardt
2015-03-09
cpu: o3: another assert instead of check
Nilay Vaish
2015-03-09
cpu: o3: Remove unused code in iew, add assert instead.
Nilay Vaish
2015-03-09
cpu: o3: commit: mark pipeline delay variable as consts
Nilay Vaish
2015-03-09
cpu: o3: remove unused stat variables.
Nilay Vaish
2015-03-09
cpu: o3: combine if with same condition
Nilay Vaish
2015-03-09
cpu: o3: remove member variable squashCounter
Nilay Vaish
2015-03-09
cpu: o3: remove unused function annotateMemoryUnits()
Nilay Vaish
2015-03-02
mem: Unify all cache DPRINTF address formatting
Andreas Hansson
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