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AgeCommit message (Expand)Author
2018-02-16sim: Add gtoh/htog helpers that take an explicit endiannessChuan Zhu
2018-02-16arch-arm: Fix Secure state check in checkFPAdvSIMDTrap64Chuan Zhu
2018-02-14mem, sim-se: Fixed seg-fault in EmulationPageTable::remapRico Amslinger
2018-02-13dev: Remove unused interrupt controller in TerminalAndreas Sandberg
2018-02-13sim: Make Stats truly non-copy-constructibleRekai Gonzalez-Alberquilla
2018-02-09Fix DDR4_2400_8x8 DRAMCTRL configurationWendy Elsasser
2018-02-09sim: Remove _numContexts member in System classGiacomo Travaglini
2018-02-09dev: Fix i8042 device errorsJason Lowe-Power
2018-02-08mem-cache: Make cache warmup percentage a parameter.Daniel R. Carvalho
2018-02-08arch-arm: Correct SecureMonitorTrap vals for aarch32Giacomo Travaglini
2018-02-08arch-arm: Fixed error in choosing vector offsetChuan Zhu
2018-02-08arch-arm: Don't change PSTATE in Illegal Exception returnGiacomo Travaglini
2018-02-08arch-arm: Handle route to EL2 in Supervisor TrapChuan Zhu
2018-02-07arch-arm: Change the type of fault for dc ivac instructionsNikos Nikoleris
2018-02-07arch-arm: Unify permission checks for dc * instructionsNikos Nikoleris
2018-02-07arch-arm: Check cache maintenance insts for permission faultsNikos Nikoleris
2018-02-07arch-arm: Turn dc ivac to dc civac when some conditions are metNikos Nikoleris
2018-02-07arch-arm: Fix printing of the data cache maintenance instructionsNikos Nikoleris
2018-02-07arch-arm: Fix cache line size for cache maintenace instNikos Nikoleris
2018-02-07arch-arm: Fault when dc ivac is executed from EL0Nikos Nikoleris
2018-02-07mem-cache: Only pendingModified MSHRs can satisfy CMO snoopsNikos Nikoleris
2018-02-07mem-cache: Cleaned blocks should be marked as not writableNikos Nikoleris
2018-02-07arch-arm: Change function name for banked miscregsGiacomo Travaglini
2018-02-07arch-arm: Fix AArch32 SETEND InstructionGiacomo Travaglini
2018-02-07arch-arm: Correct Illegal Exception Return detectionGiacomo Travaglini
2018-02-07arch-arm: ELUsingAArch32K from armarm pseudocodeGiacomo Travaglini
2018-02-07arch-arm: isSecureBelow from armarm pseudocodeGiacomo Travaglini
2018-02-07arch-arm: Fix incorrect assumptions in ELIs64Chuan Zhu
2018-02-06mem-cache: Remove extra numSets zero check.Daniel R. Carvalho
2018-02-06mem: Standardize mem folder header guardsDaniel R. Carvalho
2018-02-05base: Update #includes for bitunion.hh.Gabe Black
2018-02-05cpu: MinorCPU handling IsSquashAfter flagGiacomo Travaglini
2018-02-05arch-arm: Removing Serializing flag from ISBGiacomo Travaglini
2018-02-02base: Fix unused function warningNikos Nikoleris
2018-02-01alpha: fix for no 'break' in the case statementSujay Phadke
2018-01-31arch-x86: consistent style of comments in system filesChristian Menard
2018-01-30arch-x86: Granularity bit and segment limitMaximilian Stein
2018-01-29riscv: Add overrides to various StaticInst methods.Gabe Black
2018-01-29base: Remove the ability to cprintf stringstreams directly.Gabe Black
2018-01-29base: Delete commented out versions of the format_integer function.Gabe Black
2018-01-29arch-arm: understandably initialize register permissionsCurtis Dunham
2018-01-29arm: extend MiscReg metadata structuresCurtis Dunham
2018-01-29arch-arm: understandably initialize register mappingsCurtis Dunham
2018-01-29arm: DT autogeneration - generate PCI nodeGlenn Bergmans
2018-01-29arm: DT autogeneration - Generate energy controller nodeGlenn Bergmans
2018-01-29arm: DT autogeneration - autogenerate RealView Platform devicesGlenn Bergmans
2018-01-29arm: DT autogeneration - Generate memory nodeGlenn Bergmans
2018-01-29arm: DT autogeneration - Generate cpus nodeGlenn Bergmans
2018-01-29arm: DT autogeneration - Device Tree generation methodsGlenn Bergmans
2018-01-29ext: DT autogeneration - Add PyFtd to m5 spaceGlenn Bergmans
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