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AgeCommit message (Expand)Author
2017-07-14riscv: Disambiguate between the C and C++ versions of isnan and isinf.Gabe Black
2017-07-14riscv: Fix bugs with RISC-V decoder and detailed CPUsAlec Roelke
2017-07-14riscv: Add unused attribute to some registers.hh constantsAlec Roelke
2017-07-13arch-arm: fix ldm of pc interswitching branchGedare Bloom
2017-07-12ruby: Refactor some Event subclasses to lambdasSean Wilson
2017-07-12arm: Refactor some Event subclasses to lambdasSean Wilson
2017-07-12dev: Refactor some Event subclasses to lambdasSean Wilson
2017-07-12net: Refactor some Event subclasses to lambdasSean Wilson
2017-07-12testers: Refactor some Event subclasses to lambdasSean Wilson
2017-07-12kvm, mem: Refactor some Event subclasses into lambdasSean Wilson
2017-07-12cpu: Refactor some Event subclasses to lambdasSean Wilson
2017-07-12gpu-compute: Refactor some Event subclasses to lambdasSean Wilson
2017-07-12sim, gdb: Refactor some Event subclasses into lambdasSean Wilson
2017-07-12mips, x86: Refactor some Event subclasses into lambdasSean Wilson
2017-07-12cpu, sim: Add param to force CPUs to wait for GDBJose Marinho
2017-07-11arch-riscv: Add support for compressed extension RV64CAlec Roelke
2017-07-11arch-riscv: Restructure ISA descriptionAlec Roelke
2017-07-10dev-arm: Add ID registers to the GIC modelJose Marinho
2017-07-10arch-arm: Support PMU evens in the 0x4000-0x4040 rangeJose Marinho
2017-07-10dev-arm: Don't unconditionally overwrite bootloader paramsJose Marinho
2017-07-10dev: Fix OnIdle test in DmaReadFifoRohit Kurup
2017-07-10dev: Fix address type promotion issues in VirtIO devicesSascha Bischoff
2017-07-10sim: Fix clashing stat names in TickedObject and TickedJose Marinho
2017-07-07kvm, arm: don't create interrupt events while saving GIC stateCurtis Dunham
2017-07-07kvm, arm: Don't forward IRQ/FIQ when using the kernel's GICAndreas Sandberg
2017-07-05arch: ISA parser additions of vector registersRekai Gonzalez-Alberquilla
2017-07-05cpu: Added interface for vector reg fileRekai Gonzalez-Alberquilla
2017-07-05arch: added generic vector registerRekai Gonzalez-Alberquilla
2017-07-05cpu: Result refactoringRekai Gonzalez-Alberquilla
2017-07-05cpu: Simplify the rename interface and use RegIdRekai Gonzalez-Alberquilla
2017-07-05cpu: Physical register structural + flat indexingNathanael Premillieu
2017-07-05arch, cpu: Architectural Register structural indexingNathanael Premillieu
2017-07-05arm,kvm: update CP15 timer model when exiting KvmCurtis Dunham
2017-07-05dev,arm: add Kvm mode of operation for CP15 timerCurtis Dunham
2017-07-05dev,arm: remove and recreate timer events around drainsCurtis Dunham
2017-07-05kvm: move Kvm check from ARM Kvm GIC to SystemCurtis Dunham
2017-06-29arm: Fix memleak in Pl390 by adding destructorSean Wilson
2017-06-29arm: Fix memleak in VGic by adding destructorSean Wilson
2017-06-27mem-cache: Add missing overrides to BaseCacheAndreas Sandberg
2017-06-22arm,sim: fix context switch stats dumps for ARM64/LinuxPaul Rosenfeld
2017-06-21sim: Updated ClockedObject power state warningJason Lowe-Power
2017-06-20sim, x86: Replace EventWrapper use with EventFunctionWrapperSean Wilson
2017-06-20dev: Replace EventWrapper use with EventFunctionWrapperSean Wilson
2017-06-20arm: Replace EventWrapper use with EventFunctionWrapperSean Wilson
2017-06-20cpu, gpu-compute: Replace EventWrapper use with EventFunctionWrapperSean Wilson
2017-06-20mem: Replace EventWrapper use with EventFunctionWrapperSean Wilson
2017-06-20mem: Replace EventWrapper in PacketQueue with EventFunctionWrapperSean Wilson
2017-06-20sim: Add generic EventFunctionWrapperSean Wilson
2017-06-20mem: Move the Rank construction logic to the Rank constructorSean Wilson
2017-06-20sim: Remove DelayFunctionSean Wilson