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2017-06-20sim: Add generic EventFunctionWrapperSean Wilson
Add EventFunctionWrapper, an event wrapper which takes any callable object to use as its callback. (This includes c++ lambdas, function pointers, bound functions, and std::functions.) Change-Id: Iab140df47bd0f7e4b3fe3b568f9dd122a43cee1c Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3743 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
2017-06-20mem: Move the Rank construction logic to the Rank constructorSean Wilson
This change was made so Rank objects have their name assigned when they are instantiated. Therefore, they can initialize their member objects with their name and it is less likely to change during runtime. (NOTE: I would recommend hiding the fields which would cause the name to change behind getters. Since modification of `Rank.rank` during runtime will cause the `name()` to change.) Change-Id: Id51c3553b40e489792c57950e18b8ce927e43173 Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3742 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2017-06-20sim: Remove DelayFunctionSean Wilson
`DelayFunction` is unused. Change-Id: I28aa756054c9b121fe4cfa65c393366f26ccb128 Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3741 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-06-19arm: ignore writes to the reset_ctl registerGedare Bloom
Change-Id: I953521572e6ace475b656369c9f07ddfa50d731a Signed-off-by: Gedare Bloom <gedare@rtems.org> Reviewed-on: https://gem5-review.googlesource.com/3263 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-06-19dev, arm: add a9mpcore global timer deviceGedare Bloom
Change-Id: I6d8a5e3795291b2a4cce022f555cf4b04f997538 Signed-off-by: Gedare Bloom <gedare@rtems.org> Reviewed-on: https://gem5-review.googlesource.com/3262 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-06-16dev, virtio: Use of Unix socket for virtIO 9P deviceAnouk Van Laer
This commit adds support for diod to use a unix socket, rather than a TCP port. We don't rely on the IP-based connection as we directly use pipes to interact with diod. This allows it to work on any system, even if the specific port is taken by another diod instance (or similar). Secondly, the Unix socket could in theory be used to debug. However, this functionality has not been tested. Change-Id: I616e0ad8768da1dfc867de3af98cdfbb22a72d63 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2820 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-06-15x86: Add consistent overrides to process.hhSean Wilson
Change-Id: I912601b6f781a0bbedd06583c059589374f6d5c6 Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3720 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Joe Gross <joe.gross@amd.com> Reviewed-by: Gabe Black <gabeblack@google.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-06-15x86: Fixed remote debugging of simulated codeMatthias Hille
GDB breaks if more bytes are sent than the transmitted registers actually need. Therefore the GdbRegCache struct needs to be packed to prevent padding at the end. Change-Id: Ib2c14eb70becdac609eb4f475d5dddbd5bcc60da Signed-off-by: Matthias Hille <matthiashille8@gmail.com> Reviewed-on: https://gem5-review.googlesource.com/3020 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-06-15mem-garnet: Fix garnet statsJavier Cano-Cano
This patch fix some statistics that in presence of a resetStats instruction were not reseted. This bug makes impossible to obtain reliable network statistics when the simulation doesn't start from tick zero. Change-Id: Ibec45f08d95bf0a533d94b70ec960719206ae945 Maintainer: Tushar Krishna <tushar@ece.gatech.edu> Reviewed-on: https://gem5-review.googlesource.com/3700 Reviewed-by: Jieming Yin <bjm419@gmail.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-06-13arm: Refactor the VExpress_EMM system creationNikos Nikoleris
Change-Id: Iac3d15719b2bbc426020a27d6b47a4baaab078c7 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2907 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-06-13ruby: Add support for address ranges in the directoryNikos Nikoleris
Previously the directory covered a flat address range that always started from address 0. This change adds a vector of address ranges with interleaving and hashing that each directory keeps track of and the necessary flexibility to support systems with non continuous memory ranges. Change-Id: I6ea1c629bdf4c5137b7d9c89dbaf6c826adfd977 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2903 Reviewed-by: Bradford Beckmann <brad.beckmann@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-06-09dev: Avoid arbitrarily deep stack depth in the i8254xGBe model.Gabe Black
When it comes time to send a packet with the i8254xGBe model hooked up to EtherTap and while running in KVM mode, the packet will first go to the EtherTap over the network style port between them. EtherTap, because it's not actually a model of anything in the simulation, will immediately pass the packet off to the real network and report that the transmission was successful to the i8254xGBe. The i8254xGBe will notice that it still has stuff it can send (the KVM mode CPU has no trouble keeping it full) and will, without returning and collapsing the stack, immediately call back into EtherTap with the next packet. This loop repeats, continually deepening the stack, until gem5 crashes with a segfault. To break this loop, a few small changes have been made. First, txFifoTick has been repurposed slightly so that it continuously keeps track of whether there's still work to do to flush out the fifo during the current tick. The code in txWire has been adjusted slightly so that it clears that variable at the start (also removing some redundancy), so that other code can set it again if more work needs to be done. Specifically, the ethTxDone function will set that flag. If there's more work to be done flushing the Fifo while in tick(), it will loop until txFifoTick stays cleared, meaning either the Fifo is empty, or the object on the other end hasn't said it's done yet. Finally, a new bool member called inTick has been added which keeps track of whether the tick() function is still active somewhere in the callstack. If it is, then the tick event shouldn't be rescheduled in ethTxDone, since tick will take care of that before it returns. It won't check to see if it needs to, and so without this check there's a panic from scheduling the same event twice. It's not completely clear that the Fifo should send packets over and over as fast as the other side accepts them within the same tick, although it's not clear that it shouldn't either. If not, then probably all that would need to change would be to remove the "while" loop so that the tick event would be rescheduled, and the Fifo would be further emptied the next time around. Change-Id: I653379b43389d0539ecfadb3fc6c40e38a8864c2 Reviewed-on: https://gem5-review.googlesource.com/3642 Reviewed-by: Andreas Hansson <andreas.hansson@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2017-06-06scons: Try to handle problems with gcc, lto and partial linking.Gabe Black
gcc has had a lot of problems with incremental linking and partial linking at the same time. Basically, the partial link assumes that it's the only link that's going to happen, and it converts weak external symbols into regular external symbols. Then when the real final link happens, those symbols are duplicated and the link fails. Versions of gcc 6 and greater add an option called -flinker-output which lets you tell the linker to do an incremental link. Unfortunately, other bugs make that fail, and so gcc 6 doesn't work either. Hopefully version 7 works better. A --force-lto option was added so that, when only one of lto and partial linking is available, you can switch from having partial linking to having lto. Change-Id: I5e293f5cfb07a14343dc74030d99cb161fb8bbbe Reviewed-on: https://gem5-review.googlesource.com/3680 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-06-03base: misc: Include cstdlib in base/misc.hh.Gabe Black
Some of the macros, notably panic, uses exit(). Callers shouldn't have to know that or have coincidentally included cstdlib, the provider of exit, themselves. Change-Id: I634602ed1795dcc8897b4bddb1167c96763acc18 Reviewed-on: https://gem5-review.googlesource.com/3601 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-06-03config: Adjust load_addr_mask in VExpress_GEM5_V1Weiping Liao
Fix load_addr_mask in VExpress_GEM5_V1 in order to boot with the 64-bit kernel. Change-Id: I13a0a752c60e53262a245cb24b16606071041397 Reviewed-on: https://gem5-review.googlesource.com/3643 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-06-03dev: Add a version of EtherTap which uses the tap driver.Gabe Black
The object is called EtherTap (as opposed to EtherTapStub, what the former EtherTap was renamed to), and its existance is gated on the linux/if_tun.h header file existing. That's probably overly strict, but it will hopefully be minimally likely to break the build for other systems. Change-Id: Ie03507fadf0d843a4d4d52f283c44a416c6f2a74 Reviewed-on: https://gem5-review.googlesource.com/3646 Reviewed-by: Nathan Binkert <nate@binkert.org> Maintainer: Nathan Binkert <nate@binkert.org>
2017-06-03dev: Refactor the EtherTapStub to make room for using tap.Gabe Black
A lot of the implementation of EtherTapStub can be shared with a version which uses a tap device directly. This change factors out those parts to accommodate that. Change-Id: I9c2e31f1be139ca73859a83f05457cef90101006 Reviewed-on: https://gem5-review.googlesource.com/3645 Reviewed-by: Nathan Binkert <nate@binkert.org> Maintainer: Nathan Binkert <nate@binkert.org>
2017-06-03dev: Rename EtherTap to be EtherTapStub.Gabe Black
The EtherTap object is going to be reworked so that it connects to a tap device directly, but it's worthwhile to still be able to use the m5tap utility (util/tap) to send/receive packets on systems which don't support tap but do support the pcap API. It can also be used to replay ethernet frames, to capture the ethernet frames coming from gem5 for analysis, to programmatically consume and/or generate the frames, or even to forward them to/from a remote system. Change-Id: Ic7bd763d86cd913ac373dd10a8d6d1fc6b35f95a Reviewed-on: https://gem5-review.googlesource.com/3644 Reviewed-by: Nathan Binkert <nate@binkert.org> Maintainer: Nathan Binkert <nate@binkert.org>
2017-06-02dev: Add a missing parameter to the EtherTap device.Gabe Black
There needs to be a SlavePort called "tap" for the ethertap device to be able to connect to the gem5 network successfully. Change-Id: I1ad81219f612fd1ec278c6148af728d20bc916da Reviewed-on: https://gem5-review.googlesource.com/3580 Reviewed-by: Nathan Binkert <nate@binkert.org> Maintainer: Nathan Binkert <nate@binkert.org>
2017-05-31ruby: Don't set the block data when a store conditional failsNikos Nikoleris
Previously the Sequencer upon a Store Conditional would unconditionally set the data of the memory location. This change checks and prevents a failed Store Conditional from modifying any data. Change-Id: Id63c9579d8f054f0e95c6d338a7e31aa48762755 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2902 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Bradford Beckmann <brad.beckmann@amd.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-05-31python: Fix unproxing of VectorParamsNikos Nikoleris
Previously proxy vector parameters would resolve correctly only for Parent.all. Any other proxy such as Parent.any, or exact ones such as Parent.addr_range would resolve to a *vector* of the right value resulting into a vector of a vector. For example if we set: DirectoryController0.addr_range = [0x100000-0x1fffff, 0x200000-0x2fffff] DirectoryMemory0.addr_range = Parent.addr_range where DirectoryController0 is the parent SimObject of DirectoryMemory0 after unproxying the Parent.addr_range VectorParam we would get DirectoryMemory0.addr_range = [[0x100000-0x1fffff, 0x200000-0x2fffff]] This change unifies handling of all three proxies to the same correct unproxy mechanism. Change-Id: Ie5107f69f58eb700b3e1b92c55210e0d53e6788d Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2901 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-05-31dev, arm: ignore writes to the SCUGedare Bloom
Change-Id: I31808b6d7ca2bc2af41deaec747e3a13bd4f77d2 Signed-off-by: Gedare Bloom <gedare@rtems.org> Reviewed-on: https://gem5-review.googlesource.com/3261 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-05-26x86: Rework how VEX prefixes are decoded.Gabe Black
Remove redundant information from the ExtMachInst, hash the vex information to ensure the decode cache works properly, print the vex info when printing an ExtMachInst, consider the vex info when comparing two ExtMachInsts, fold the info from the vex prefixes into existing settings, remove redundant decode code, handle vex prefixes one byte at a time and don't bother building up the entire prefix, and let instructions that care about vex use it in their implementation, instead of developing an entire parallel decode tree. This also eliminates the error prone vex immediate decode table which was incomplete and would result in an out of bounds access for incorrectly encoded instructions or when the CPU was mispeculating, as it was (as far as I can tell) redundant with the tables that already existed for two and three byte opcodes. There were differences, but I think those may have been mistakes based on the documentation I found. Also, in 32 bit mode, the VEX prefixes might actually be LDS or LES instructions which are still legal in that mode. A valid VEX prefix would look like an LDS/LES with an otherwise invalid modrm encoding, so use that as a signal to abort processing the VEX and turn the instruction into an LES/LDS as appropriate. Change-Id: Icb367eaaa35590692df1c98862f315da4c139f5c Reviewed-on: https://gem5-review.googlesource.com/3501 Reviewed-by: Joe Gross <joe.gross@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
2017-05-25x86: sim: Make 32 bit x86 processes work again.Gabe Black
When the LiveProcess class was renamed to be just Process, the CL author also changed the syscall function from a virtual function into a regular one. Unfortunately, the I386Process class overrode the syscall function to adjust the return address so that control would return to the right place. Without that adjustment, 32 bit x86 process would segfault and die immediately after their first system call. This change reinstates the virtual specifier on the base syscall function, and adds an override keyword on the I386Process's version so that it won't be orphaned again in the future. It also fixes some small style issues the style checker script complained about. Change-Id: I0d1178ea0eda6676050c8fc043820a2bb4d99c0d Reviewed-on: https://gem5-review.googlesource.com/3500 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-05-24arm: Fix incorrect handling of PMEVTYPERx_EL0 in PMUAndreas Sandberg
The PMU model currently doesn't calculate the PMU event counter index correctly for writes to the PMEVTYPER[0-5]_EL0 registers. Fix this obvious mistake. Change-Id: I2913eedddeb98480660e2d63948f6d727adf5ab8 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Sudhanshu Jha <sudhanshu.jha@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3121 Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
2017-05-24python: Fix PyEvent reference counting bugAndreas Sandberg
The current implementation of reference counting for PyEvents only partially works. The native object is currently kept alive while it is in the event queue. However, if the Python object goes out of scope, the Python side of this object is garbage collected which leaves a "dangling" native object. This results in confusing error messages where PyBind is unable to find the Python implementation of an event when it is triggered. Implement reference counting using the generalized reference counting API instead. Change-Id: I4e8e04abc4f61dff238d718065f5371e73b38ab3 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3222 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-05-24sim: Add hooks to implement event reference countingAndreas Sandberg
We currently only support deleting an event if it is triggered and not re-scheduled. This is fine for most native code. However, there are cases where Python needs to count references to make sure that the Python object stays live while the native object is live. Generalise the mechanism used to implement by adding reference counting hooks to the event base class: * Event::acquire() / Event::acquireImpl() * Event::release() / Event::releaseImpl() These calls can be used to implement both reference counting and the existing AutoDelete functionality. The default implementation in Event maintains backwards compatibility with the existing AutoDelete feature by ignoring acquireImpl() and deleting the event on releaseImpl() if it isn't scheduled anymore. Since AutoDelete functionality is no longer the only way events can be managed, this change introduces the new Managed flag. This flag activates automatic memory management. The acquireImpl()/releaseImpl() methods are only called from acquire()/release() it is set. To maintain backwards compatibility, AutoDelete is used as an alias for Managed. Change-Id: I5637984c906a9d44c22780712cf1c521b8297149 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3221 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-05-23arch-riscv: Fix bad stack initializationAlec Roelke
This patch fixes a problem with RISC-V initial stack setup in SE mode where the AT_RANDOM aux vector value contains an address that is too close to the top of the stack and doesn't fit the required 16 bytes. To fix this, the program header table was added to the top of the stack just like the RISC-V proxy kernel does. Change-Id: I814562e060ff041cd0d7a7c54c3685645bd325a3 Reviewed-on: https://gem5-review.googlesource.com/3401 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Alec Roelke <ar4jc@virginia.edu>
2017-05-23arch-arm: Fix some poorly done type max and min in NEONRekai Gonzalez-Alberquilla
The ISA code for ARM calculates min and max elements for types using bit manipulation. That triggers some warnings, treated as errors, as the compiler can tell that there is an overflow and the sign flips. Fixed using standard lib definitions instead. Change-Id: Ie2331b410c7f76d4bd87da5afe9edf20c8ac91b3 Reviewed-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3481 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-05-22python: Prevent Python wrappers from deleting SimObjectsAndreas Sandberg
The PyBind wrappers could potentially delete SimObjects if they don't have any references. This is not desirable since there could be pointers to such objects within the C++ world. This problem doesn't normally occur since Python typically holds a pointer to the root node as long as the simulator is running. Prevent SimObject and Param deletion by using a PyBind-prescribed unique_ptr with a dummy deleter as the pointer wrapper for the Python world. Change-Id: Ied14602c9ee69a083a69c5dae1b5fcf8efb4548a Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3224 Reviewed-by: Gabe Black <gabeblack@google.com>
2017-05-22python: Fix weird memory issue in wrapped AddrRange vectorsAndreas Sandberg
There is a weird issue with the PyBind wrapper of vector<AddrRange>. Assigning new values to a param that is a vector of AddrRange sometimes results in an out-of-bounds memory access. We work around this issue by treating AddrRange vectors as opaque types. This slightly changes the semantics of the wrapper since Python now manipulates the real object rather than a copy that has been converted to a list. Change-Id: Ie027c06e7a7262214b43b19a76b24fe4b20426c5 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Timothy Hayes <timothy.hayes@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3223 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-05-19python: Remove unused readline importAndreas Sandberg
The readline module is imported by main.py but doesn't seem to be used. Change-Id: I7888e3b6ad0a0fedc14b0feec2adf0a39883bbf8 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3421 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-05-19base, sim, arch: Fix clang 5.0 warningsAndreas Sandberg
Compiling gem5 with recent version of clang (4 and 5) triggers warnings that are treated as errors: * Global templatized static functions result in a warning if they are not used. These should either be declared as static inline or without the static identifier to avoid the warning. * Some templatized classes contain static variables. The instantiated versions of these variables / templates need to be explicitly declared to avoid a compiler warning. Change-Id: Ie8261144836e94ebab7ea04ccccb90927672c257 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3420 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-05-18base: Refactor the GDB code.Gabe Black
The new version modularizes the implementation of the various commands, gets rid of dynamic allocation of the register cache, fixes some small style problems, and uses exceptions to simplify error handling internal to the GDB stub. Change-Id: Iff3548373ce4adfb99106a810f5713b769df89b2 Reviewed-on: https://gem5-review.googlesource.com/3280 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Boris Shingarov <shingarov@gmail.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-05-18syscall_emul, riscv: add override keyword to RISCV Process classBrandon Potter
Change-Id: I2a146ae57aac3787389997961208474a97e7c155 Reviewed-on: https://gem5-review.googlesource.com/3360 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Alec Roelke <ar4jc@virginia.edu>
2017-05-16x86: Fix the multiplication microops.Gabe Black
If the operands were 64 bit, an intermediate calculation could lose a carry bit. This change rearranges that intermediate calculation if the operand width is large, and reworks the microop implementation in general in an attempt to make it easier to understand. Change-Id: Ib36333f3f2695a33cd9623e43682de22ebd2e7ea Reviewed-on: https://gem5-review.googlesource.com/3381 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
2017-05-16python: Add a helper function to create Python eventsAndreas Sandberg
Add a helper function, m5.event.create(), to create events from Python. This function takes a callable Python object (e.g., a function) as an argument and optionally a priority as a keyword argument. This function was accidentally dropped from the public API when switching to PyBind. Change-Id: Icbd0e392d9506934ec2c9f541199aa35c1c2df8c Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3220 Reviewed-by: Gabe Black <gabeblack@google.com>
2017-05-15style: fix line lengths and include orderingBrandon Potter
The style checker complains about line length and ordering for these files. This fix should make these two files kosher. Change-Id: I822a0518a98d9e379a543d2017e90c4e9666a58d Reviewed-on: https://gem5-review.googlesource.com/3380 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com>
2017-05-15cpu: fix problem with forwarding and locked loadAlec Roelke
If a (regular) store is followed closely enough by a locked load that overlaps, the LSQ will forward the store's data to the locked load and never tell the cache about the locked load. As a result, the cache will not lock the address and all future store-conditional requests on that address will fail. This patch fixes that by preventing forwarding if the memory request is a locked load and adding another case to the LSQ forwarding logic that delays the locked load request if a store in the LSQ contains all or part of the data that is requested. [Merge second and last if blocks because their bodies are the same.] Change-Id: I895cc2b9570035267bdf6ae3fdc8a09049969841 Reviewed-on: https://gem5-review.googlesource.com/2400 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-05-15arm, dev: stub out GIC distributor interrupt groupsCurtis Dunham
We don't implement the GICD_IGROUPRn registers, which is allowed, but to be correct, they should be RAZ/WI (read as zero, writes ignored). Change-Id: I8039baf72f45c0095f41e165b8e327c79b1ac082 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2620 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-05-12base: Make the VNC server more resilient.Gabe Black
If the client does something bad, don't kill the whole simulation, just complain, drop the client and keep going. Change-Id: I824f2d121e2fe03cdf4323a25c192b68e0370acc Reviewed-on: https://gem5-review.googlesource.com/3200 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-05-12misc: Make the remote GDB stub more resilient to bad connections.Gabe Black
Currently, if the remote gdb stub fails to read a byte from an incoming packet because the connection has been dropped, the read call will return anyway and the calling code will have no way to know something bad happened. It might reattempt the read over and over again waiting for some particular byte, doomed to never make forward progress. This change modifies the remote GDB code so that if a read or write call fails, it will instead detach from the debugger and continue. Before this change, When simulating a port scan, ie connecting to the debugger port and then immediately dropping the connection using this command: nc -v -n -z -w 1 127.0.0.1 7000 gem5 would enter the previously described death spiral. After it, gem5 detaches from the bad connection and resumes execution. Subsequently attaching with gdb was successful. This code is written in a C centric style, and would benefit from some refactoring. Change-Id: Ie3c0bb35b9cfe3671d0f731e3907548bae0d292f Reviewed-on: https://gem5-review.googlesource.com/3180 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-05-12syscall_emul: Fix undefined macro behaviorAndreas Sandberg
Clang's UBSAN implementation complains about macros that expand to expressions that contain 'defined'. Explicitly set the various feature macros to 1 or 0 to avoid this issue. Change-Id: Iba239dacfe526c43ab9c5da5183a350fc4fdc57d Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Hansson <andreas.hansson@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3241
2017-05-12arm: Remove unused DumpStatsPCEventF class in FreeBSD systemAndreas Sandberg
The DumpStatsPCEventF is declared but lacks an implementation. This confuses RTTI in clang. Remove this class since it is clearly not needed. Change-Id: Ib95f09f2ba8593f8d0e072b96afd5f8a9ed31070 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3240 Reviewed-by: B.A. Zeeb <baz21@cam.ac.uk>
2017-05-10scons: Use the generalized switching headers on the GPU ISA.Gabe Black
Now that the switching header implementation has been generalized, there's no need to have two nearly identical implementations for the two different groups of headers. Change-Id: Ie7c24fcddbc672ac5ca2d69bfc35696f42c55580 Reviewed-on: https://gem5-review.googlesource.com/2984 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-05-10scons: arch: Generalize the switching header code.Gabe Black
Factor out the ISA ness of the switching header generating function. Also turn it into a SCons builder which builds a single header, and a wrapping method which uses the builder on a group of header files which all target the same subdirectory. Change-Id: I87705f97b6ebd9baebd4ebcfea19cc1218a64ad0 Reviewed-on: https://gem5-review.googlesource.com/2983 Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-05-09misc: Add the --listener-loopback-only command line option.Gabe Black
This option invokes the Listener::loopbackOnly() static function which will make the port listeners bind to the loopback device exclusively and ignore connections on other devices. That prevents external agents like port scanners from disrupting simulations with spurious connections. Change-Id: I46b22165046792a6f970826c109bdbce7db25c84 Reviewed-on: https://gem5-review.googlesource.com/3082 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-05-09misc: Expose the listener loopbackOnly function to python.Gabe Black
Change-Id: Ibb405af54a46a93706a6f476b5314491e84be0c8 Reviewed-on: https://gem5-review.googlesource.com/3081 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-05-09base: Teach the socket listeners how to bind to the loopback.Gabe Black
The loopback device will allow access to various services like remote GDB debugging, connecting to the terminal, etc., without letting external agents like port scanners connect and disrupting the simulation. Change-Id: I76dccbf152fa278ae9f342b25f7e345a1329fbe4 Reviewed-on: https://gem5-review.googlesource.com/3080 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-05-09python: Fix debug flag listing regressionAndreas Sandberg
The PyBind11 changes slightly modified gem5's internal debug interfaces. The corresponding change to the public API went missing before the new bindings were merged. This change updates the Python glue to use the new interface. Change-Id: I3ecca5a3f6c35b99d55126d697371124f81a12dd Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Matteo Andreozzi <matteo.andreozzi@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3140 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>