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invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
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Age
Commit message (
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Author
2013-09-06
ruby: network: removes reset functionality
Nilay Vaish
2013-09-06
ruby: network: shorten variable names
Nilay Vaish
2013-09-06
stats: adds a Formula operator for division
Nilay Vaish
2013-09-06
ruby: converts sparse memory stats to gem5 style
Nilay Vaish
2013-09-05
sim: Fix clang warning for unused variable
Andreas Hansson
2013-09-04
util: Add ini string as tooltip info in dot output
Andreas Hansson
2013-09-04
util: Add colours to the dot output
Andreas Hansson
2013-09-04
util: Add class name to dot graph and output to svg
Andreas Hansson
2013-09-04
arch: Resurrect the NOISA build target and rename it NULL
Andreas Hansson
2013-09-04
cpu: Move the branch predictor out of the BaseCPU
Andreas Hansson
2013-09-04
arch: Header clean up for NOISA resurrection
Andreas Hansson
2013-09-04
alpha: Move system virtProxy to Alpha only
Andreas Hansson
2013-09-04
scons: Enable build on OSX
Andreas Hansson
2013-08-20
cpu: Fix timing CPU isDrained comment formatting
Andreas Hansson
2013-08-20
base: Fix VectorPrint initialisation
Andreas Hansson
2013-08-19
stats: Cumulative stats update
Andreas Hansson
2013-08-19
cpu: Accurately count idle cycles for simple cpu
Lena Olson
2013-08-19
config: Command line support for multi-channel memory
Andreas Hansson
2013-08-19
mem: Change AbstractMemory defaults to match the common case
Andreas Hansson
2013-08-19
cpu: Fix TrafficGen trace playback
Sascha Bischoff
2013-08-19
mem: Use STL deque in favour of list for DRAM queues
Andreas Hansson
2013-08-19
mem: Perform write merging in the DRAM write queue
Andreas Hansson
2013-08-19
mem: Replacing bytesPerCacheLine with DRAM burstLength in SimpleDRAM
Amin Farmahini
2013-08-19
cpu: Fix timing CPU drain check
Andreas Hansson
2013-08-19
alpha: Check interrupts before quiesce
Andreas Hansson
2013-08-19
stats: Fix issue when printing 2D vectors
Sascha Bischoff
2013-08-19
power: Add voltage domains to the clock domains
Akash Bagdia
2013-08-19
mem: Warn instead of panic for tXAW violation
Andreas Hansson
2013-08-19
mem: Allow disabling of tXAW through a 0 activation limit
Andreas Hansson
2013-08-19
mem: Add an internal packet queue in SimpleMemory
Andreas Hansson
2013-08-19
cpu: Fix a bug in the O3 CPU introduced by the cache line patch
Andreas Hansson
2013-08-07
ruby: slicc: remove double trigger, continueProcessing
Nilay Vaish
2013-08-07
ruby: slicc: move some code to AbstractController
Nilay Vaish
2013-08-07
x86: add tlb checkpointing
Nilay Vaish
2013-07-19
cpu: Remove unused getBranchPred() method from BaseCPU
Andreas Sandberg
2013-07-18
mem: Set the cache line size on a system level
Andreas Hansson
2013-07-18
mem: Add cache class destructor to avoid memory leaks
Xiangyu Dong
2013-07-18
sim: Make MaxTick in Python match the one in C++
Andreas Hansson
2013-07-15
loader: Load weak symbols for function tracing
Deyuan Guo
2013-07-15
debug : Fixes the issue wherein Debug symbols were not getting dumped into tr...
Umesh Bhaskar
2013-07-11
dev: make BasicPioDevice take size in constructor
Steve Reinhardt
2013-07-11
dev: consistently end device classes in 'Device'
Steve Reinhardt
2013-07-11
dev/arm: get rid of AmbaDev namespace
Steve Reinhardt
2013-07-11
devices: make more classes derive from BasicPioDevice
Steve Reinhardt
2013-07-11
ruby: removed the very old double trigger hack
Brad Beckmann
2013-06-28
ruby: append transition comment only when in opt/debug
Nilay Vaish
2013-06-28
ruby: network: remove reconfiguration code
Nilay Vaish
2013-06-27
mem: Reorganize cache tags and make them a SimObject
Prakash Ramrakhyani
2013-06-27
mem: Remove the cache builder
Andreas Hansson
2013-06-27
config: Remove Clock parameter multiplication
Andreas Hansson
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