gem5 - gem5

Age	Commit message (Expand)	Author
2018-11-14	mem-cache: Move access latency calculation to Cache	Daniel R. Carvalho
2018-11-14	arch-arm: Print register name when warning on AT instructions	Giacomo Travaglini
2018-11-14	mem-cache: implement a probe-based interface	Javier Bueno
2018-11-14	sim: Move BitUnion overloading to show/parseParams	Giacomo Travaglini
2018-11-14	sim: Move paramIn/Out definition to header file	Giacomo Travaglini
2018-11-13	cpu: Fixed PC shifting on LTAGE branch predictor	Pau Cabre
2018-11-13	mem-cache: Align how we handle requests in atomic with timing	Nikos Nikoleris
2018-11-12	systemc: Push python headers on top of sources	Giacomo Travaglini
2018-11-12	systemc: Stop using python to set/manage the global time resolution.	Gabe Black
2018-11-12	sim: Push the global frequency management code into C++.	Gabe Black
2018-11-09	systemc: Get rid of a duplicated base class initializer for sc_fifo.	Gabe Black
2018-11-09	systemc: Add a missing "const" on one of the sc_event operators.	Gabe Black
2018-11-09	systemc: Only build python utility code if python is enabled.	Gabe Black
2018-11-09	systemc: Separate and conditionalize exposing sc_main to python.	Gabe Black
2018-11-09	systemc: Seperate out the sc_main fiber and its bookkeeping.	Gabe Black
2018-11-09	systemc: Stop using python init to set up predefined message ids.	Gabe Black
2018-11-09	systemc: Wrap some report maps in functions.	Gabe Black
2018-11-07	mem-ruby: Use Packet writing functions instead of memcpy	Daniel R. Carvalho
2018-11-07	arch-arm: Deprecate usage of legacy bootloader patching	Giacomo Travaglini
2018-11-07	arch-arm: ArmSystem::resetAddr64 renamed to be used in AArch32	Giacomo Travaglini
2018-11-07	arch-arm: Implement AArch32 RVBAR	Giacomo Travaglini
2018-11-07	arch-arm: Remove SCTLR.VE bit	Giacomo Travaglini
2018-11-07	arch-arm: Refactor ISA::clear by adding a ISA::clear32 method	Giacomo Travaglini
2018-11-07	arch-arm: Remove MISCREG commented numbers	Giacomo Travaglini
2018-11-06	mips: Change the integer and fp register widths to be 64 bits.	Gabe Black
2018-11-06	mips: Clean up type overrides for operands.	Gabe Black
2018-11-06	mips: Explicitly truncate the syscall return value down to 32 bits.	Gabe Black
2018-11-05	null: Claim to use 64 bit floating point registers.	Gabe Black
2018-11-05	sparc: Switch the FloatReg and FloatRegBits types to be 64 bit.	Gabe Black
2018-11-05	base: Add standard types for floating and nonfloating point register values.	Gabe Black
2018-11-05	systemc: Enable systemc support by default.	Gabe Black
2018-11-05	systemc: Explicitly keep the sc_port bind alongside sc_in's version.	Gabe Black
2018-11-05	systemc: Change how SC_BIND_PROXY_NIL is initialized.	Gabe Black
2018-11-05	systemc: Get rid of implementations for some disabled sc_vector methods.	Gabe Black
2018-11-05	systemc: Move a function after the class it uses internally.	Gabe Black
2018-11-05	systemc: Get rid of an unused private member in sc_clock.	Gabe Black
2018-11-05	mem-cache: Rename the tag class init function to tagsInit.	Gabe Black
2018-11-05	mem: Use Packet writing functions instead of memcpy	Daniel R. Carvalho
2018-11-05	mem-cache: Fix double block invalidation	Daniel R. Carvalho
2018-11-05	arch, arm: Return s1Req upon fault in s2Lookup	Anouk Van Laer
2018-11-05	arch, arm: Effect of AT instructions on descriptor handling	Anouk Van Laer
2018-10-30	syscall_emul: fix openat when directory does not end in "/"	Ciro Santilli
2018-10-29	syscall_emul: implement arm openat	Ciro Santilli
2018-10-29	arch-arm: FIXUP for the add PRFM PST instruction commit	Yuetsu Kodama
2018-10-26	mem-ruby: Fix MOESI_CMP_directory in ports order	Nikos Nikoleris
2018-10-26	arch-arm: We add PRFM PST instruction for arm	yuetsu.kodama
2018-10-26	arch-arm: IMPDEF for SYS instruction with CRn = {11, 15}	Giacomo Travaglini
2018-10-26	arch-arm: AArch64 Instruction for MISCREG_IMPDEF_UNIMPL	Giacomo Travaglini
2018-10-26	arch-arm: Refactor AArch64 MSR/MRS trapping	Giacomo Travaglini
2018-10-26	arch-arm: Trap to EL2 only if not in Secure State	Giacomo Travaglini