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gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
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Age
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Author
2018-05-30
gpu-compute: use X86ISA::TlbEntry over GpuTlbEntry
Brandon Potter
2018-05-30
dev: Exit correctly in dist-gem5 for SE mode
Michael LeBeane
2018-05-30
mem-cache: Determine if an MSHR has requests from another cache
Nikos Nikoleris
2018-05-29
arch-arm: ISA param for treating MISCREG_IMPDEF_UNIMPL as NOP
Giacomo Travaglini
2018-05-29
arch-arm: Remove unusued MISCREG_A64_UNIMPL
Giacomo Travaglini
2018-05-29
arch-arm: MPIDR.MT = 1 in a multithreaded system
Giacomo Travaglini
2018-05-29
arch-arm: S3_<op1>_<Cn>_<Cm>_<op2> are Implementation defined
Giacomo Travaglini
2018-05-29
cpu: Avoid unnecessary dynamic_pointer_cast in atomic model
Giacomo Travaglini
2018-05-29
arch-arm: Implement ARMv8.1 TTBR1_EL2 register
Giacomo Travaglini
2018-05-29
arch-arm: Add E2H bit to HCR_EL2 System register
Giacomo Travaglini
2018-05-24
x86: Add op classes to the MediaOps.
Gabe Black
2018-05-18
mem: Add support for more flexible DRAM timing and topologies
Wendy Elsasser
2018-05-18
mem: Optimize self-refresh entry
Wendy Elsasser
2018-05-17
mem-cache: Move reference count stats update to blk invalidation
Nikos Nikoleris
2018-05-17
mem-cache: Remove isTouched field from the CacheBlk
Nikos Nikoleris
2018-05-17
mem-cache: Move replacements stat to the base cache class
Nikos Nikoleris
2018-05-17
base: Add M5 flag for [[nodiscard]] attribute
Nikos Nikoleris
2018-05-17
mem-cache: Simplify writeback for the tempBlock in recvTimingResp
Nikos Nikoleris
2018-05-16
arch-arm: Fix semihosting arg count for SYS_GET_CMDLINE
Andreas Sandberg
2018-05-16
arch-arm: Add support for semihosting STDIO redirection
Andreas Sandberg
2018-05-16
style: fix amd license and style issues
Tony Gutierrez
2018-05-15
gpu-compute: Cleanup the scheduler a bit
Tony Gutierrez
2018-05-12
arch-riscv: Update CSR implementations
Alec Roelke
2018-05-09
sim: Remove trailing dot when assigning a master's name
Giacomo Travaglini
2018-05-09
base, dev: Fix port message for vnc and terminal
Andreas Sandberg
2018-05-08
arch-x86, arch-power: fix calls to bits and insertBits
Matt Sinclair
2018-05-08
mem-cache: Create block insertion function
Daniel R. Carvalho
2018-05-08
arch-arm: Map ID_x_EL1 registers to AArch32 version
Giacomo Travaglini
2018-05-08
dev: Add support for a simple debug UART
Andreas Sandberg
2018-05-03
mem-ruby: Consistent dprintf formats for issue outcomes
Brad Beckmann
2018-05-03
arch-x86: Enable fstatfs for x86_64
Tony Gutierrez
2018-05-03
mem-cache: Create Second-Chance replacement policy
Daniel R. Carvalho
2018-05-03
mem-cache: ReplacementPolicy specific replacement data
Daniel R. Carvalho
2018-05-02
arch-x86: implement movntps/movntpd SSE insts
Steve Reinhardt
2018-05-02
x86: Add a ld/st microop flag for marking an access uncacheable.
Gabe Black
2018-05-02
arch-x86: Enable the umask system call
Tony Gutierrez
2018-04-27
sim,cpu,mem,arch: Introduced MasterInfo data structure
Giacomo Travaglini
2018-04-26
mem-cache: Use block iteration in BaseSetAssoc
Daniel R. Carvalho
2018-04-20
docs: Fix power model doxygen
Jason Lowe-Power
2018-04-19
mem-cache: Use findBlock in FALRU's block access
Daniel R. Carvalho
2018-04-19
mem-cache: Use secure flag in FALRU's findBlock
Daniel R. Carvalho
2018-04-19
arch-arm: Add ARMv8.1 TTBR1_EL2 register
Giacomo Travaglini
2018-04-19
arch-arm: Fix Unknown Instruction disassemble
Giacomo Travaglini
2018-04-19
arch-arm: Change disassemble when MSR to UNKNOWN register
Giacomo Travaglini
2018-04-18
mem-cache: Create NRU Replacement Policy
Daniel R. Carvalho
2018-04-18
arch-arm: Fix masking in CPACR_EL1
Chuan Zhu
2018-04-18
arch-arm: Mask out unsupported trapped exception handling bits
Chuan Zhu
2018-04-18
arch-arm: Fix FPEXC32_EL2 to FPEXC mapping
Chuan Zhu
2018-04-18
arch-arm: Adding MiscReg Priv (EL1) global flag
Giacomo Travaglini
2018-04-18
arch-arm: Correct masking of cp10 and cp11 in CPACR
Chuan Zhu
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