| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2009-08-09 | X86: Decode byte sized singed divide as byte sized. | Gabe Black | |
| 2009-08-08 | X86: Make not taken conditional moves leave the destination alone. Adjust ↵ | Gabe Black | |
| CMOVcc. The manuals from both AMD and Intel say that when writing to a 32 bit destination in 64 bit mode, the upper 32 bits of the register are filled with zeros. They also both say that the CMOV instructions leave their destination alone when their condition fails. Unfortunately, it seems that CMOV will zero extend its destination register whether or not it was supposed to actually do a move on both platforms. This seems to be the only case where this happens, but it would be hard to say for sure. | |||
| 2009-08-07 | X86: (Re)Implemented SHRD. | Gabe Black | |
| 2009-08-07 | X86: Implement SHLD. | Gabe Black | |
| 2009-08-07 | X86: Implement shift right/left double microops. | Gabe Black | |
| This is my best guess as far as what these should do. Other existing microops use implicit registers, mul1s and mul1u for instance, so this should be ok. The microop that loads the implicit DoubleBits register would fall into one of the microop slots for moving to/from special registers. | |||
| 2009-08-07 | X86: Make the qaud width bswap instruction handle the fact that 32 bit ↵ | Gabe Black | |
| operations zero extend. | |||
| 2009-08-07 | X86: Use the right field when using legacy prefixes to distinguish instructions. | Gabe Black | |
| 2009-08-07 | X86: Don't truncate the immediate parameter for the ENTER instruction. | Gabe Black | |
| 2009-08-06 | X86: Adjust the various sizes used for the enter and leave instructions. | Gabe Black | |
| 2009-08-06 | X86: Make scas compare its operands in the right order. | Gabe Black | |
| 2009-08-06 | X86: Fix a copy/paste error for cmovnp. | Gabe Black | |
| 2009-08-05 | merge | Derek Hower | |
| 2009-08-05 | ruby: configuration supports multiple runs in same session | Derek Hower | |
| These changes allow to run Ruby-gems multiple times from the same ruby-lang script with different configurations | |||
| 2009-08-05 | protocol: made MI_example dma mapping generic | Derek Hower | |
| 2009-08-05 | Merge with head. | Gabe Black | |
| 2009-08-05 | X86: Make conditional moves zero extend their 32 bit destinations always. | Gabe Black | |
| 2009-08-05 | X86: Fix condition code setting for signed multiplies with negative results. | Gabe Black | |
| 2009-08-05 | X86: Make the check for negative operands for sign multiply more direct. | Gabe Black | |
| 2009-08-05 | X86: Make sure immediate values are truncated properly. | Gabe Black | |
| Register values will be "picked" which will assure they don't have junk beyond the part we're using. Immediate values don't go through a similar process, so we should truncate them explicitly. | |||
| 2009-08-05 | X86: Use the new forced folding mechanism for the SAHF and LAHF instructions. | Gabe Black | |
| 2009-08-05 | X86: Fix the indexing for ah in byte division instructions. | Gabe Black | |
| 2009-08-05 | X86: Fix the indexing for ah in byte multiply instructions. | Gabe Black | |
| 2009-08-05 | X86: Let microops force folding an index into the high byte of a register. | Gabe Black | |
| 2009-08-05 | X86: Handle rotate left with carry instructions that go all the way around ↵ | Gabe Black | |
| or more. | |||
| 2009-08-05 | X86: Set the flags on rotate left with carry instructions. | Gabe Black | |
| 2009-08-05 | X86: Handle rotate right with carry instructions that go all the way around ↵ | Gabe Black | |
| or more. | |||
| 2009-08-05 | X86: Fix the overflow bit for rotate right with carry. | Gabe Black | |
| 2009-08-05 | X86: Fix the computation of the bottom part of rotate right with carry. | Gabe Black | |
| 2009-08-05 | X86: Fix the computation of the upper part of rotate right with carry. | Gabe Black | |
| 2009-08-05 | X86: Set the flags for rotate right with carry instructions. | Gabe Black | |
| 2009-08-05 | X86: Handle rotating right all the way around or more. | Gabe Black | |
| 2009-08-05 | X86: Set the flags on a rotate right instruction. | Gabe Black | |
| 2009-08-05 | X86: Make shifts/rotations that write to 32 bits of a register zero extend. | Gabe Black | |
| 2009-08-05 | X86: Handle left rotations that go all the way around or more. | Gabe Black | |
| 2009-08-05 | X86: Actually set the flags on a rotate left instruction. | Gabe Black | |
| 2009-08-05 | X86: Fix the sar carry flag. | Gabe Black | |
| 2009-08-05 | X86: Fix sign extension when doing an arithmetic shift right by 0. | Gabe Black | |
| 2009-08-05 | X86: Fix the carry flag for shr. | Gabe Black | |
| 2009-08-05 | X86: Fix the carry flag for shl. | Gabe Black | |
| 2009-08-05 | X86: Fix how the parity flag is computed. | Gabe Black | |
| It's only for the lowest order byte, and I had the polarity wrong. | |||
| 2009-08-04 | ruby: made mapAddressToRange based off a bit count | Derek Hower | |
| 2009-08-04 | slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllers | Derek Hower | |
| This changeset contains a lot of different changes that are too mingled to separate. They are: 1. Added MOESI_CMP_directory I made the changes necessary to bring back MOESI_CMP_directory, including adding a DMA controller. I got rid of MOESI_CMP_directory_m and made MOESI_CMP_directory use a memory controller. Added a new configuration for two level protocols in general, and MOESI_CMP_directory in particular. 2. DMA Sequencer uses a generic SequencerMsg I will eventually make the cache Sequencer use this type as well. It doesn't contain an offset field, just a physical address and a length. MI_example has been updated to deal with this. 3. Parameterized Controllers SLICC controllers can now take custom parameters to use for mapping, latencies, etc. Currently, only int parameters are supported. | |||
| 2009-08-04 | slicc: generate html by default | Derek Hower | |
| 2009-08-04 | slicc: better error messages when the python parser fails | Nathan Binkert | |
| 2009-08-03 | Merged with head. | Gabe Black | |
| 2009-08-03 | X86: Fix segment override prefixes on instructions that use rbp/rsp and a ↵ | Gabe Black | |
| displacement. | |||
| 2009-08-03 | Automated merge with ssh://hg@m5sim.org/m5 | Derek Hower | |
| 2009-08-02 | X86: Set up the IDE device correctly, ie. with and using legacy ports. | Gabe Black | |
| 2009-08-02 | IDE: Configure the IDE control to reflect the initial value of the command ↵ | Gabe Black | |
| register. | |||
| 2009-08-02 | X86: Fix the high result of mul1s, and removed undefined shifts from the ↵ | Gabe Black | |
| mult microops. | |||
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