summaryrefslogtreecommitdiff
path: root/src
AgeCommit message (Expand)Author
2018-03-27dev: Remove a bunch of Alpha code from MIPS, and unnecessary TheISAs.Gabe Black
2018-03-27cpu: Remove ExtMachInst typedefs from the O3 CPU model.Gabe Black
2018-03-27arch: cpu: Make the ExtMachInst type a template argument in InstMap.Gabe Black
2018-03-27sparc: Add some missing M5_FALLTHROUGHs and breaks.Gabe Black
2018-03-27cpu: Stop extracting inst_flags from the machInst.Gabe Black
2018-03-26cpu: Proposed fix for backwards compatibility in proto/inst.proto.Gabe Black
2018-03-26arch: Fix all override related warnings.Gabe Black
2018-03-26cpu: Use the new asBytes function in the protobuf inst tracer.Gabe Black
2018-03-26arch: Add a virtual asBytes function to the StaticInst class.Gabe Black
2018-03-23mem-cache: fix missing overrides in repl policiesJason Lowe-Power
2018-03-23ruby: Make sure addresses print in hexJason Lowe-Power
2018-03-23learning_gem5: Add a simple Ruby protocolJason Lowe-Power
2018-03-23mem-cache: Create FIFO replacement policyDaniel R. Carvalho
2018-03-23mem-cache: Fix MRU rebaseDaniel R. Carvalho
2018-03-23arch-arm: Distinguish IS TLBI from non-ISGiacomo Travaglini
2018-03-23arch-arm: Created function for TLB ASID InvalidationGiacomo Travaglini
2018-03-22hsail: Get rid of an inert private member of StorageSpace.Gabe Black
2018-03-22cpu: Make the protobuf inst tracer accept variable sized instructions.Gabe Black
2018-03-22mem-cache: Create MRU replacement policyDaniel R. Carvalho
2018-03-22mem-cache: Split array indexing and replacement policies.Daniel R. Carvalho
2018-03-21mem-cache: Allow clean operations when block allocation failsNikos Nikoleris
2018-03-20arch-arm, configs: Treat the bootloader rom as cacheable memoryNikos Nikoleris
2018-03-20arch, arm: Fix implicit-fallthrough GCC warningsChun-Chen Hsu
2018-03-20riscv: throw IllegalInstFault when decoding invalid instructionsTuan Ta
2018-03-15arm: Fix implicit-fallthrough warnings when building with gcc-7+Siddhesh Poyarekar
2018-03-15arch-x86,sim-se: Enable prlimit syscallJason Lowe-Power
2018-03-15sim-se: Fix fallthrough in prlimitJason Lowe-Power
2018-03-15arch-x86,sim-se: Bump kernel version to 3.2Jason Lowe-Power
2018-03-15sim-se: Add /sys/devices/system/cpu/online fileJason Lowe-Power
2018-03-15arch-arm: Fix unused variable warning in faults.ccNikos Nikoleris
2018-03-15x86: Add bitfields which can gather/scatter bases and limits.Gabe Black
2018-03-14x86: Simplify the implementations of RDTSC and RDTSCP slightly.Gabe Black
2018-03-14x86: Implement the RDTSCP instruction.Gabe Black
2018-03-14x86: Mark the RDTSC instruction as .serialize_before.Gabe Black
2018-03-14x86: Replace the .serializing directive with .serialize_(before|after).Gabe Black
2018-03-14arm: Fix maybe-uninitialized GCC warningsChun-Chen Hsu
2018-03-14base: Fix loop range in pngwriterChun-Chen Hsu
2018-03-14arch-arm: ERET from AArch64 to AArch32 ignore MSBsGiacomo Travaglini
2018-03-12mem-ruby: Fix RubyPrefetcher support in MESI_Two_LevelRico Amslinger
2018-03-12arch-arm: Adding IPA-Based Invalidating instructionsGiacomo Travaglini
2018-03-12arch-arm: Implement missing aarch32 TLBI registersGiacomo Travaglini
2018-03-09mem-cache: Use CacheBlk parameter on address regenerationDaniel R. Carvalho
2018-03-08mem-cache: Fix missing overridesJason Lowe-Power
2018-03-08sparc: Passify a new g++ warning.Gabe Black
2018-03-08arch-arm: Enable Debug IFSC when faulting to aarch64 modeGiacomo Travaglini
2018-03-08arch-arm: Fix FSC generation in AbortFaultGiacomo Travaglini
2018-03-08arch-arm: Introduce update method in ArmFault classGiacomo Travaglini
2018-03-08arch-arm: Fix PCAlignmentFault routing to HypervisorGiacomo Travaglini
2018-03-07mem-cache: Make the block invalidate functions virtualNikos Nikoleris
2018-03-07mem-cache: Make invalidate a common function between tag classesNikos Nikoleris
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-09 16:06:36 +0000