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AgeCommit message (Expand)Author
2018-10-03systemc: Make verify.py filter out some error messages.Gabe Black
2018-10-03systemc: Tell verify.py to expect two tests to fail.Gabe Black
2018-10-03systemc: Raise an error when SC_METHOD, etc. is used after starting.Gabe Black
2018-10-03systemc: Teach verify.py how to expect failing error codes.Gabe Black
2018-10-03systemc: Keep track of more cases when we should be ready after resume.Gabe Black
2018-10-03systemc: When sensitive to an event finder, find on all interfaces.Gabe Black
2018-10-03systemc: Make Process track whether it's dynamic on its own.Gabe Black
2018-10-03systemc: Track the module who's end_of_elaboration callback we're in.Gabe Black
2018-10-03systemc: sc_spawn can create static or dynamic processes.Gabe Black
2018-10-03systemc: Improve handling of empty process handles.Gabe Black
2018-10-03systemc: Ensure all objects and events have unique names.Gabe Black
2018-10-03systemc: Make sure children of processes are recorded as such.Gabe Black
2018-10-03systemc: Clamp the time of events to the present.Gabe Black
2018-10-03systemc: Implement support for the default time unit.Gabe Black
2018-10-03systemc: Implement most of sc_fifo and its interfaces.Gabe Black
2018-10-02sim-se: Set ArmProcess64 hwcaps depending on ID regsGiacomo Travaglini
2018-10-02sim-se: Different HWCAP for ArmProcess32/64Giacomo Travaglini
2018-10-02arch-arm: Add FP16 support introduced by Armv8.2-AEdmund Grimley Evans
2018-10-02arch: Fix unserialization of VectorReg valueGabor Dozsa
2018-10-02arch-arm: Add FP16 support and other primitives to fplibEdmund Grimley Evans
2018-10-01arch-arm: Implement AArch64 ID regs as bitunionsGiacomo Travaglini
2018-10-01arch-arm: Implement AArch64 ID_AA64MMFR2_EL1 registerGiacomo Travaglini
2018-10-01arch-arm: Move MiscReg BitUnions into a separate header fileGiacomo Travaglini
2018-10-01arch-arm: Init AArch64 ID registers in SE modeGiacomo Travaglini
2018-10-01cpu: Fix typo in header guard for Noncaching cpuGiacomo Travaglini
2018-10-01dev-arm: Enable FIQ signaling for Group0 interrupts in GICv2Giacomo Travaglini
2018-10-01dev-arm: Create postFiq events for GICv2Giacomo Travaglini
2018-10-01dev-arm: Implement GICv2 GICD_IGROUPR registerGiacomo Travaglini
2018-10-01dev-arm: Fix GICv2 cpu interrupt enable flagGiacomo Travaglini
2018-10-01dev-arm: Add basic support for level sensitive SPIs in GICv2Adrien Pesle
2018-10-01sim: Extend (UN)SERIALIZE_ARRAY to BitUnionsGiacomo Travaglini
2018-09-28dev-arm: Make CpuLocalTimer use standard ArmInterruptPinGiacomo Travaglini
2018-09-28dev-arm: Take into account PPI enable bitGiacomo Travaglini
2018-09-28arch-arm: raise/clear IRQ when writing to PMOVSCLR/SETGiacomo Travaglini
2018-09-26systemc: Report errors when proc ctrl funcs are called during elab.Gabe Black
2018-09-26systemc: Abort verify.py if no tests were selected.Gabe Black
2018-09-26systemc: Make verify.py run the tests from the directory they expect.Gabe Black
2018-09-26systemc: Add a --working-dir option to the test config.py.Gabe Black
2018-09-26systemc: Change the test binaries to use rpath.Gabe Black
2018-09-26systemc: Handle sc_stop called from sc_main correctly.Gabe Black
2018-09-26systemc: Fix some issues with starvation checks.Gabe Black
2018-09-26systemc: When sc_start-ing with zero time, ensure the ready event runs.Gabe Black
2018-09-26systemc: Fix where we checked if sc_stop was called durig elaboration.Gabe Black
2018-09-26systemc: Make sure methods aren't restarted by yield.Gabe Black
2018-09-26systemc: When a thread completes, yield to the scheduler.Gabe Black
2018-09-26systemc: Implement positional binding.Gabe Black
2018-09-26systemc: Use sc_assert to check the number of interfaces.Gabe Black
2018-09-26systemc: Get rid of the unused warning function in sc_event_finder_t.Gabe Black
2018-09-26systemc: Use the eq pointer directly less often in the scheduler.Gabe Black
2018-09-26systemc: Make sc_process_b less hokey, and make WAIT* work.Gabe Black