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AgeCommit message (Expand)Author
2015-07-17x86: decode instructions with vex prefixNilay Vaish
2015-07-15dev: add support for multi gem5 runsGabor Dozsa
2015-07-13mem: Fix (ab)use of emplace to avoid temporary object creationAndreas Hansson
2015-07-13mem: Updated DRAMSim2 wrapper to new drain APIAndreas Hansson
2015-07-10ruby: replace global g_abs_controls with per-RubySystem varBrandon Potter
2015-07-10ruby: replace global g_system_ptr with per-object pointersBrandon Potter
2015-07-10ruby: replace g_ruby_start with per-RubySystem m_start_cycleBrandon Potter
2015-07-10ruby: remove extra whitespace and correct misspelled wordsBrandon Potter
2015-07-07dev, arm: Add a device model that uses the NoMali modelAndreas Sandberg
2015-07-07sim: Refactor and simplify the drain APIAndreas Sandberg
2015-07-07sim: Decouple draining from the SimObject hierarchyAndreas Sandberg
2015-07-07sim: Move mem(Writeback|Invalidate) to SimObjectAndreas Sandberg
2015-07-07sim: Make the drain state a global typed enumAndreas Sandberg
2015-07-07python: Remove redundant drain when changing memory modesAndreas Sandberg
2015-07-07sim: Add macros to serialize objects into a sectionAndreas Sandberg
2015-07-07base: Add serialization support to Pixels and FrameBufferAndreas Sandberg
2015-07-07sim: Fix broken event unserializationAndreas Sandberg
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
2015-07-07sim: Add serialization macros for std containersAndreas Sandberg
2015-07-06mem: Cleanup CommMonitor in preparation for probe supportAndreas Sandberg
2015-07-04x86: Adjust the size of the values written to the x87 misc registersNikos Nikoleris
2015-07-04o3: correct the number of cc registers in rename mapNilay Vaish
2015-07-04mem: packet: Add const to constructor argumentNilay Vaish
2015-07-04ruby: drop NetworkMessage classNilay Vaish
2015-07-04ruby: mesi three level: name change to avoid clashNilay Vaish
2015-07-04ruby: remove message buffer nodeNilay Vaish
2015-07-03mem: Increase the default buffer sizes for the DDR4 controllerAndreas Hansson
2015-07-03mem: Update DRAM command scheduler for bank groupsWendy Elsasser
2015-07-03mem: Avoid DRAM write queue iteration for merging and read lookupAndreas Hansson
2015-07-03mem: Delay responses in the crossbar before forwardingAndreas Hansson
2015-07-03mem: Remove redundant is_top_level cache parameterAndreas Hansson
2015-07-03mem: Split WriteInvalidateReq into write and invalidateAndreas Hansson
2015-07-03mem: Add ReadCleanReq and ReadSharedReq packetsAndreas Hansson
2015-07-03mem: Allow read-only caches and check complianceAndreas Hansson
2015-07-03mem: Add clean evicts to improve snoop filter trackingAli Jafri
2015-07-03mem: Convert Request static const flags to enumsAndreas Hansson
2015-07-03base: remove fd from object loadersCurtis Dunham
2015-07-03scons: Bump compiler requirement to gcc >= 4.7 and clang >= 3.1Andreas Hansson
2015-06-25ruby: slicc: remove READMENilay Vaish
2015-06-25ruby: message: remove a data member added by mistakeNilay Vaish
2015-06-25Ruby: Remove assert in RubyPort retry list logicJason Power
2015-06-21base: Add a warn_if macroAndreas Sandberg
2015-06-21arm: Cleanup arch headers to remove dma_device.hh dependencyAndreas Sandberg
2015-06-09mem: Add check for express snoop in packet destructorAli Jafri
2015-06-09mem: Fix snoop packet data allocation bugAndreas Hansson
2015-06-09arm: Delete debug print in initialization of hardware threadRune Holm
2015-06-09arm: Fix typo in ldrsh instruction nameRune Holm
2015-06-09base: Reset CircleBuf size on flush()Andreas Sandberg
2015-06-09dev, arm: Include PIO size in AmbaDmaDevice constructorAndreas Sandberg
2015-06-07ruby: Fix MESI consistency bugMarco Elver
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