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AgeCommit message (Expand)Author
2014-09-20cpu: use probes infrastructure to do simpoint profilingDam Sunwoo
2014-09-20config: Cleanup .json config file generationAndrew Bardsley
2014-09-19arch: Pass faults by const reference where possibleAndreas Hansson
2014-09-19cpu: Use a deque in o3 rename instruction queueAndreas Hansson
2014-09-19base: Ensure the CP annotation compiles againAndreas Hansson
2014-09-19misc: Use safe_cast when assumptions are made about return valueAndreas Hansson
2014-09-19misc: Restore ostream flags where neededAndreas Hansson
2014-09-19stats: Fix flow-control bug in Vector2D printingAndreas Hansson
2014-09-19misc: Remove assertions ensuring unsigned values >= 0Andreas Hansson
2014-09-19mem: Check return value of checkFunctional in SimpleMemoryAndreas Hansson
2014-09-19mem: Add checks to sendTimingReq in cacheAndreas Hansson
2014-09-15ruby: network: revert some of the changes from ad9c042dce54Nilay Vaish
2014-09-12cpu: Fix memory access in Minor not setting parent Request flagsAndrew Bardsley
2014-09-12style: Fix line continuation, especially in debug messagesAndrew Bardsley
2014-09-12minor: Fix typo in DPRINTF for Minor branch predictionAndreas Hansson
2014-09-09sim: Automatically unregister probe listenersAndreas Sandberg
2014-09-09config: Fix vectorparam command line parsingGeoffrey Blake
2014-09-09cpu: Only iterate over possible threads on the o3 cpuMitch Hayenga
2014-09-09mem: Add accessor function for vaddrMitch Hayenga
2014-09-09sim: Fix resource leak in BaseGlobalEventAndreas Sandberg
2014-09-09misc: Fix a number of unitialised variables and membersAndreas Hansson
2014-09-03dev: seperate legacy io offsets from PCI offsetAli Saidi
2014-09-03arm: Support >2GB of memory for AArch64 systemsAli Saidi
2014-09-03dev, arm: Add support for linux generic pci host driverAli Saidi
2014-09-03config: Add port splicing capability to PortRef classGeoffrey Blake
2014-09-03config: Refactor RealviewEMM to fit into new config systemGeoffrey Blake
2014-09-03base: Use STL C++11 random number generationAndreas Hansson
2014-09-03base: Use the global Mersenne twister throughoutAndreas Hansson
2014-09-03mem: Avoid unecessary retries when bus peer is not readyAndreas Hansson
2014-09-03arm: Make memory ops work on 64bit/128-bit quantitiesMitch Hayenga
2014-06-27mem: write streaming support via WriteInvalidate promotionCurtis Dunham
2014-09-03mem: Fix a bug in the cache port flow controlAndreas Hansson
2014-05-13cpu, mem: Make software prefetches non-blockingCurtis Dunham
2014-05-13mem: Refactor assignment of Packet typesCurtis Dunham
2014-09-03x86: Flag instructions that call suspend as IsQuiesceMitch Hayenga
2014-09-03cpu: Fix o3 drain bugMitch Hayenga
2014-09-03arm: Fix v8 neon latency issue for loads/storesMitch Hayenga
2014-04-29arm: use condition code registers for ARM ISACurtis Dunham
2014-09-03arm: ISA X31 destination register fixAndrew Bardsley
2014-09-03cpu: fix bimodal predictor to use correct global history regDam Sunwoo
2014-09-03arm: Mark v7 cbz instructions as direct branchesMitch Hayenga
2014-09-03cpu: Fix cache blocked load behavior in o3 cpuMitch Hayenga
2014-09-03cpu: Fix o3 quiesce fetch bugMitch Hayenga
2014-09-03cpu: Fix SMT scheduling issue with the O3 cpuMitch Hayenga
2014-09-03cpu: Fix incorrect speculative branch predictor behaviorMitch Hayenga
2014-09-03cpu: Add a fetch queue to the o3 cpuMitch Hayenga
2014-09-03cpu: Fix o3 front-end pipeline interlock behaviorMitch Hayenga
2014-09-03cpu: Change writeback modeling for outstanding instructionsMitch Hayenga
2014-09-03arch: Properly guess OpClass from optional StaticInst flagsMitch Hayenga
2014-09-03cache: Fix handling of LL/SC requests under contentionGeoffrey Blake
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