| Age | Commit message (Expand) | Author |
|---|
| 2014-02-18 | dev: Include basic devices in NULL ISA build | Andreas Hansson |
| 2014-02-18 | mem: Filter cache snoops based on address ranges | Andreas Hansson |
| 2014-02-18 | mem: Add a wrapped DRAMSim2 memory controller | Andreas Hansson |
| 2014-02-18 | mem: Fix input to DPRINTF in CommMonitor | Andreas Hansson |
| 2014-02-09 | cpu: simple: Add support for using branch predictors | Andreas Sandberg |
| 2014-02-06 | base: calls abort() from fatal | Nilay Vaish |
| 2014-02-06 | ruby: memory controller: use MemoryNode * | Nilay Vaish |
| 2014-02-05 | x86: Fix x87 state transfer bug | Andreas Sandberg |
| 2014-02-02 | x86, kvm: Fix bug in the RFlags get and set functions | Nikos Nikoleris |
| 2014-01-30 | unittest: Fix build errors | Ola Jeppsson |
| 2014-01-29 | mem: Add additional tolerance to stride prefetcher | Mitch Hayenga |
| 2014-01-29 | mem: Allowed tagged instruction prefetching in stride prefetcher | Mitch Hayenga |
| 2014-01-29 | mem: prefetcher: add options, support for unaligned addresses | Mitch Hayenga ext:(%2C%20Amin%20Farmahini%20%3Caminfar%40gmail.com%3E) |
| 2014-01-29 | cpu: fix bug when TrafficGen deschedules event | Xiangyu Dong |
| 2014-01-28 | arm: Enable umask syscall in SE mode | Mitch Hayenga |
| 2014-01-28 | base: Fix race condition in the socket listen function | Mitch Hayenga |
| 2014-01-28 | mem: Remove redundant findVictim() input argument | Amin Farmahini |
| 2014-01-28 | mem: Fixes a bug in simple_dram write merging | Amin Farmahini |
| 2014-01-27 | x86: use lfpimm instead of limm for fptan | Nilay Vaish |
| 2014-01-27 | x86: implements x87 add/sub instructions | Nilay Vaish |
| 2014-01-27 | x86: implements fxch instruction. | Nilay Vaish |
| 2014-01-27 | x86: correct error in emms instruction. | Nilay Vaish |
| 2014-01-24 | arm: Add support for ARMv8 (AArch64 & AArch32) | ARM gem5 Developers |
| 2014-01-24 | arch: Make all register index flattening const | Andreas Hansson |
| 2014-01-24 | checker: CheckerCPU handling of MiscRegs was incorrect | Geoffrey Blake |
| 2014-01-24 | arch, cpu: Add support for flattening misc register indexes. | Ali Saidi |
| 2014-01-24 | cpu: Add support for Memory+Barrier instruction types in O3 cpu. | Giacomo Gabrielli |
| 2014-01-24 | cpu: Add support for instructions that zero cache lines. | Ali Saidi |
| 2014-01-24 | cpu: Add CPU support for generatig wake up events when LLSC adresses are snoo... | Ali Saidi |
| 2014-01-24 | mem: Add flag to request if it was generated by a page table walk | Giacomo Gabrielli |
| 2014-01-24 | mem: Add support for a security bit in the memory system | Giacomo Gabrielli |
| 2014-01-24 | sim: Add openat/fstatat syscalls and fix mremap | Chris Adeniyi-Jones |
| 2014-01-24 | mem: Remove explict cast from memhelper. | Ali Saidi |
| 2014-01-24 | Cache: Collect very basic stats on tag and data accesses | Timothy M. Jones |
| 2014-01-24 | mem: per-thread cache occupancy and per-block ages | Dam Sunwoo |
| 2014-01-24 | base: add support for probe points and common probes | Matt Horsnell |
| 2014-01-24 | sim: Expose the current voltage for each object as a stat | Andreas Hansson |
| 2014-01-24 | sim: Expose the current clock period as a stat | Andreas Hansson |
| 2014-01-24 | mem: track per-request latencies and access depths in the cache hierarchy | Matt Horsnell |
| 2014-01-24 | config: Make the Clock a Tick parameter like Latency/Frequency | Andreas Hansson |
| 2014-01-24 | x86: Fix memory leak in table walker | Andreas Hansson |
| 2014-01-24 | cpu: Relax check on squashed non-speculative instructions | Andreas Hansson |
| 2014-01-24 | cpu: remove faulty simpoint basic block inst count assertion | Dam Sunwoo |
| 2014-01-17 | ruby: remove unused label no_vector | Nilay Vaish |
| 2014-01-10 | ruby: move all statistics to stats.txt, eliminate ruby.stats | Nilay Vaish |
| 2014-01-10 | stats: add function for adding two histograms | Nilay Vaish |
| 2014-01-09 | ruby: fix bug introduced to revision 8523754f8885 | Nilay Vaish |
| 2014-01-08 | ruby: slicc: remove variable 'addr' used in calls to doTransition | Nilay Vaish |
| 2014-01-04 | ruby: add a three level MESI protocol. | Nilay Vaish |
| 2014-01-04 | ruby: rename MESI_CMP_directory to MESI_Two_Level | Nilay Vaish |
