| Age | Commit message (Expand) | Author |
|---|
| 2013-12-20 | ruby: slicc: replace max_in_port_rank with number of inports | Nilay Vaish |
| 2013-12-20 | ruby: declare variables to be unsigned in Address.hh | Nilay Vaish |
| 2013-12-20 | ruby: mesi: remove owner and sharer fields from directory tags | Nilay Vaish |
| 2013-12-03 | sim: reset stats after startup | Nilay Vaish |
| 2013-12-03 | cpu: call BaseCPU startup() function in o3 cpu | Nilay Vaish |
| 2013-11-29 | base: Fix race in PollQueue and remove SIGALRM workaround | Andreas Sandberg |
| 2013-11-29 | base: Clean up signal handling | Andreas Sandberg |
| 2013-11-26 | sim: correct ticksToCycles() function. | Nilay Vaish |
| 2013-10-15 | kvm: Set the perf exclude_host attribute if available | Andreas Sandberg |
| 2013-11-26 | x86: Implementation of Int3 and Int_Ib in long mode | Christian Menard |
| 2013-11-26 | kvm: Remove the unused hostFreq member from BaseKvmCPU | Andreas Sandberg |
| 2013-11-25 | sim: simulate with multiple threads and event queues | Steve Reinhardt ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E%2C%20Ali%20Saidi%20%3CAli.Saidi%40ARM.com%3E) |
| 2013-11-15 | cpu: allow the fetch buffer to be smaller than a cache line | Anthony Gutierrez |
| 2013-11-15 | cpu: Fix Checker register index use | Andreas Hansson |
| 2013-11-14 | tests: suppress output on switcheroo tests | Steve Reinhardt |
| 2013-11-12 | sim: fix event priority name for debug-start option | Anthony Gutierrez |
| 2013-11-01 | mem: Fixes for DRAM stats accounting | Andreas Hansson |
| 2013-11-01 | mem: Fix the LPDDR3 page size | Andreas Hansson |
| 2013-11-01 | mem: Adding stats for DRAM power calculation | Neha Agarwal |
| 2013-11-01 | mem: Unify request selection for read and write queues | Neha Agarwal |
| 2013-11-01 | mem: Add a simple adaptive version of the open-page policy | Andreas Hansson |
| 2013-11-01 | mem: Just-in-time write scheduling in DRAM controller | Neha Agarwal |
| 2013-11-01 | mem: Add tRRD as a timing parameter for the DRAM controller | Andreas Hansson |
| 2013-11-01 | mem: Less conservative tRAS in DRAM configurations | Andreas Hansson |
| 2013-11-01 | mem: Make tXAW enforcement less conservative and per rank | Ani Udipi |
| 2013-11-01 | mem: Fix for 100% write threshold in DRAM controller | Neha Agarwal |
| 2013-11-01 | mem: Pick the next DRAM request based on bank availability | Andreas Hansson |
| 2013-11-01 | mem: Use the same timing calculation for DRAM read and write | Ani Udipi |
| 2013-11-01 | mem: Fix DRAM bank occupancy for streaming access | Ani Udipi |
| 2013-11-01 | mem: Schedule time for DRAM event taking tRAS into account | Ani Udipi |
| 2013-11-01 | mem: Add tRAS parameter to the DRAM controller model | Ani Udipi |
| 2013-11-01 | sim: Clarify the difference between tracing and debugging | Andreas Hansson |
| 2013-10-31 | ARM: add support for TEEHBR access | Chander Sudanthi |
| 2013-10-31 | dev: Add 'OSC' oscillator sys control reg support to VersatileExpress | Matt Evans |
| 2013-10-31 | dev: Add support for MSI-X and Capability Lists for ARM and PCI devices | Geoffrey Blake |
| 2013-10-31 | dev: Fix race conditions in IDE device on newer kernels | Geoffrey Blake |
| 2013-10-31 | base: Add support for ipv6 into inet.hh/inet.cc | Geoffrey Blake |
| 2013-10-31 | cpu: Construct ROB with cpu params struct instead of each variable | Faissal Sleiman |
| 2013-10-31 | config: Fix handling of parents for simobject vectors | Geoffrey Blake |
| 2013-10-31 | sim: added option to serialize SimLoopExitEvent | Dam Sunwoo |
| 2013-10-31 | mem: Add "const" attribute to Packet getters | Stephan Diestelhorst |
| 2013-10-31 | mem: Add privilege info to request class | Prakash Ramrakhyani |
| 2013-10-31 | cpu: Fix O3 issuse with load+barrier instructions. | Ali Saidi |
| 2013-10-30 | ruby: set SenderMachine in messages of MOESI_CMP_directory | Lluc Alvarez |
| 2013-10-30 | ruby: Fixed a deadlock when restoring a checkpoint with garnet | Emilio Castillo |
| 2013-10-17 | mem: De-virtualise interfaces in the CoherentBus | Stephan Diestelhorst |
| 2013-10-17 | cpu: add consistent guarding to *_impl.hh files. | Matt Horsnell |
| 2013-10-17 | mem: Add PortID to QueuedMasterPort constructor | Sascha Bischoff |
| 2013-10-17 | arm: Add a 'clear PPI' method to gic_pl390 | Matt Evans |
| 2013-10-17 | config: Fix ommission of number base in ethernet address param | Geoffrey Blake |
