gem5 - gem5

Age	Commit message (Collapse)	Author
2018-06-14	system-arm: Split the VExpress_GEM5_V1 base dts	Andreas Sandberg
	With the introduction of the new DPU model, we need different variations of the VExpress_GEM5_V1 platform. This splits the platform dtsi file into a separate file for the base platform and the HDLCD-based platform. This matches the hierarchy in RealView.py. Change-Id: Id02380122655b5d3aa3548a703fdef178bba17d9 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/11035 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
2018-06-07	dev-arm: Add a VirtIO MMIO device to VExpress_GEM5_V1	Andreas Sandberg
	Add an ARM-specific VirtIO MMIO device to the VExpress_GEM5_V1 platform. Change-Id: Id1e75398e039aad9d637f46f653cda9084d3d2fe Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Sudhanshu Jha <sudhanshu.jha@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Rekai Gonzalez Alberquilla <rekai.gonzalezalberquilla@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2327
2018-06-06	system-arm: Update gem5 timer interrupt specification	Andreas Sandberg
	The DTB for the VExpress_GEM5_V1 was incorrectly flagging timer interrupts as being edge triggered. Describe the interrupt as being level triggered to match Juno and FVP. Change-Id: I9ce4b8959e7cc28d8b208727119ff20e581311f8 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com> Reviewed-on: https://gem5-review.googlesource.com/10024 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
2016-02-23	arm: Ship Linux device trees with gem5	Andreas Sandberg
	Ship aarch32 and aarch64 device trees with gem5. We currently ship device trees as a part of the gem5 Linux kernel repository. This makes tracking hard since device trees are supposed to be platform dependent rather than kernel dependent (Linux considers device trees to be a stable kernel ABI). It also makes code sharing between aarch32 and aarch64 impossible. This changeset implements a set of device trees for the new VExpress_GEM5_V1 platform. The platform is described in a shared file that is separate from the memory/CPU description. Due to differences in how secondary CPUs are initialized, aarch32 and aarch64 use different base files describing CPU nodes and the machine's compatibility property.