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path: root/tests/configs/memtest.py
AgeCommit message (Expand)Author
2012-10-15Mem: Use cycles to express cache-related latenciesAndreas Hansson
2012-10-15Configs: Set the memtest clock to a reasonable valueAndreas Hansson
2012-09-25Cache: add a response latency to the cachesMrinmoy Ghosh
2012-07-12Mem: Make SimpleMemory single portedAndreas Hansson
2012-05-31Bus: Split the bus into a non-coherent and coherent busAndreas Hansson
2012-04-06MEM: Enable multiple distributed generalized memoriesAndreas Hansson
2012-02-13MEM: Introduce the master/slave port roles in the Python classesAndreas Hansson
2012-02-12mem: fix cache stats to use request ids correctlyDam Sunwoo
2012-01-28SE/FS: Make SE vs. FS mode a runtime parameter.Gabe Black
2012-01-17MEM: Add port proxies instead of non-structural portsAndreas Hansson
2011-03-17Mem: Fix issue with dirty block being lost when entire block transferred to n...Ali Saidi
2010-02-23cache: Make caches sharing aware and add occupancy stats.Lisa Hsu
2007-06-30Get rid of remaining traces of obsolete CoherenceProtocol object.Steve Reinhardt
2007-05-19PhysicalMemory has vector of uniform ports instead of one special one.Steve Reinhardt
2007-05-10remove hit_latency and make latency do the right thingAli Saidi
2007-02-06Add short memtest run to quick regressions.Steve Reinhardt
2006-10-19Fix corner case on assertion.Ron Dreslinski
2006-10-11Interesting memtest finally.Ron Dreslinski
2006-10-10Fix several bugs pertaining to upgrades/mem leaks.Ron Dreslinski
2006-10-09Make memtest work with 8 memtestersRon Dreslinski
2006-10-09Update the Memtester, commit a config file/test for it.Ron Dreslinski