| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-02-14 | mem: Update DRAM configuration names | Wendy Elsasser |
| 2016-10-14 | config: Make configs/common a Python package | Andreas Hansson |
| 2014-09-03 | tests: Use O3_ARM_v7a config for full-system ARM regressions | Andreas Hansson |
| 2013-08-19 | config: Move the memory instantiation outside FSConfig | Andreas Hansson |
| 2013-01-07 | tests: Create base classes to encapsulate common test configurations | Andreas Sandberg |
| 2012-10-26 | config: Fix the cache class naming in regression scripts | Andreas Hansson |
| 2012-10-25 | config: Use shared cache config for regressions | Andreas Hansson |
| 2012-10-15 | Mem: Use cycles to express cache-related latencies | Andreas Hansson |
| 2012-10-15 | Regression: Use addTwoLevelCacheHierarchy in configs | Andreas Hansson |
| 2012-09-25 | Cache: add a response latency to the caches | Mrinmoy Ghosh |
| 2012-05-31 | Bus: Split the bus into a non-coherent and coherent bus | Andreas Hansson |
| 2012-03-09 | CheckerCPU: Make some basic regression tests for CheckerCPU | Geoffrey Blake |
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