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path: root/tests/configs/realview-o3.py
AgeCommit message (Expand)Author
2017-02-14mem: Update DRAM configuration namesWendy Elsasser
2016-10-14config: Make configs/common a Python packageAndreas Hansson
2014-09-03tests: Use O3_ARM_v7a config for full-system ARM regressionsAndreas Hansson
2013-08-19config: Move the memory instantiation outside FSConfigAndreas Hansson
2013-01-07tests: Create base classes to encapsulate common test configurationsAndreas Sandberg
2012-10-26config: Fix the cache class naming in regression scriptsAndreas Hansson
2012-10-25config: Use shared cache config for regressionsAndreas Hansson
2012-10-15Mem: Use cycles to express cache-related latenciesAndreas Hansson
2012-10-15Regression: Use addTwoLevelCacheHierarchy in configsAndreas Hansson
2012-09-25Cache: add a response latency to the cachesMrinmoy Ghosh
2012-05-31Bus: Split the bus into a non-coherent and coherent busAndreas Hansson
2012-03-09cache: Allow main memory to be at disjoint address ranges.Ali Saidi
2012-03-02CPU: Check that the interrupt controller is created when neededAndreas Hansson
2012-02-13MEM: Introduce the master/slave port roles in the Python classesAndreas Hansson
2012-01-28SE/FS: Make SE vs. FS mode a runtime parameter.Gabe Black
2012-01-17MEM: Make the bus bridge unidirectional and fixed address rangeAndreas Hansson
2011-12-01O3: Remove hardcoded tgts_per_mshr in O3CPU.py.Chander Sudanthi
2011-08-19ARM: Add some MP regressions and clean up the disk images and kernels a bitAli Saidi
2011-03-17ARM: Update stats for the previous changes and add ARM_FS/O3 regression.Ali Saidi