Age | Commit message (Expand) | Author |
---|---|---|
2014-09-20 | mem: Rename Bus to XBar to better reflect its behaviour | Andreas Hansson |
2013-06-27 | sim: Add the notion of clock domains to all ClockedObjects | Akash Bagdia |
2013-06-27 | config: Add a system clock command-line option | Akash Bagdia |
2012-07-10 | regress: ruby stat additions and config changes | Brad Beckmann |
2012-05-31 | Bus: Split the bus into a non-coherent and coherent bus | Andreas Hansson |
2012-02-13 | MEM: Introduce the master/slave port roles in the Python classes | Andreas Hansson |
2012-01-30 | Merge with main repository. | Gabe Black |
2012-01-30 | Ruby: Connect system port in Ruby network test | Andreas Hansson |
2012-01-28 | SE/FS: Make SE vs. FS mode a runtime parameter. | Gabe Black |
2011-02-03 | Config: Keep track of uncached and cached ports separately. | Gabe Black |
2010-01-25 | config: changed default ruby config file for regression | Derek Hower |
2009-07-06 | ruby: Fix RubyMemory to work with the newer ruby. | Nathan Binkert |
2009-05-11 | ruby: Set up Ruby regression tests. | Steve Reinhardt |