gem5 - gem5

Age	Commit message (Expand)	Author
2012-03-09	CheckerCPU: Make some basic regression tests for CheckerCPU	Geoffrey Blake
2012-03-09	cache: Allow main memory to be at disjoint address ranges.	Ali Saidi
2012-03-08	Fix the SPARC fs regression by adding a call to createInterruptController.	Gabe Black
2012-03-02	CPU: Check that the interrupt controller is created when needed	Andreas Hansson
2012-02-14	Script: Fix the scripts that use the num_cpus cache parameter	Andreas Hansson
2012-02-13	MEM: Introduce the master/slave port roles in the Python classes	Andreas Hansson
2012-02-12	mem: fix cache stats to use request ids correctly	Dam Sunwoo
2012-01-30	Merge with main repository.	Gabe Black
2012-01-30	Ruby: Connect system port in Ruby network test	Andreas Hansson
2012-01-28	SE/FS: Make both SE and FS tests available all the time.	Gabe Black
2012-01-28	SE/FS: Make SE vs. FS mode a runtime parameter.	Gabe Black
2012-01-28	Merge with the main repo.	Gabe Black
2012-01-17	MEM: Make the bus bridge unidirectional and fixed address range	Andreas Hansson
2012-01-17	MEM: Add port proxies instead of non-structural ports	Andreas Hansson
2012-01-07	Merge with the main repository again.	Gabe Black
2011-12-01	O3: Remove hardcoded tgts_per_mshr in O3CPU.py.	Chander Sudanthi
2011-10-08	Configs: Use connectAllPorts to connect ports for simple-timing-ruby.	Gabe Black
2011-08-19	ARM: Add some MP regressions and clean up the disk images and kernels a bit	Ali Saidi
2011-07-05	X86: Add a config for an FS regression on O3.	Gabe Black
2011-06-30	Ruby: Add support for functional accesses	Brad Beckmann ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
2011-06-19	inorder: make InOrder CPU FS compilable/visible	Korey Sewell
2011-05-23	config: tweak ruby configs to clean up hierarchy	Steve Reinhardt
2011-03-17	ARM: Update stats for the previous changes and add ARM_FS/O3 regression.	Ali Saidi
2011-03-17	Mem: Fix issue with dirty block being lost when entire block transferred to n...	Ali Saidi
2011-02-23	ARM: Clarifies creation of Linux and baremetal ARM systems.	Ali Saidi
2011-02-08	memtest: due to contention increase, increased deadlock threshold	Brad Beckmann
2011-02-07	X86: Add scripts to support X86 FS configurations in the regressions.	Gabe Black
2011-02-03	Config: Keep track of uncached and cached ports separately.	Gabe Black
2010-11-08	ARM: Add full-system regressions	Ali Saidi
2010-08-20	regress: Regression tester updates	Brad Beckmann
2010-08-17	sim: fail on implicit creation of orphans via ports	Steve Reinhardt
2010-03-21	ruby: Regression updates for new ruby config locations	Brad Beckmann
2010-02-23	cache: Make caches sharing aware and add occupancy stats.	Lisa Hsu
2010-01-29	m5: Regression Tester Update	Brad Beckmann
2010-01-29	ruby: memtest-ruby updated to the new config system	Brad Beckmann
2010-01-25	config: changed default ruby config file for regression	Derek Hower
2010-01-19	merge	Derek Hower
2009-11-18	m5: refreshed the ruby memtest regression stats	Brad Beckmann
2009-11-18	ruby: included ruby config parameter ports per core	Brad Beckmann
2009-11-18	ruby: Support for merging ALPHA_FS and ruby	Brad Beckmann
2009-09-22	python: Move more code into m5.util allow SCons to use that code.	Nathan Binkert
2009-09-11	ruby: cleaned up unified MESI/MOESI configuration	Derek Hower
2009-07-06	ruby: Fix RubyMemory to work with the newer ruby.	Nathan Binkert
2009-05-12	inorder-regress: missing regress config file	Korey Sewell
2009-05-11	ruby: Set up Ruby regression tests.	Steve Reinhardt
2008-07-16	mem: use single BadAddr responder per system.	Steve Reinhardt
2008-10-20	Regression: Add single and dual boot O3 regressions. They both take about 8 m...	Ali Saidi
2007-08-10	Regression: Add an I/O Cache to the full system regressions that have a cache.	Ali Saidi
2007-06-30	Get rid of remaining traces of obsolete CoherenceProtocol object.	Steve Reinhardt
2007-05-19	PhysicalMemory has vector of uniform ports instead of one special one.	Steve Reinhardt