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AgeCommit message (Expand)Author
2011-02-07X86: Add scripts to support X86 FS configurations in the regressions.Gabe Black
2011-02-03Config: Keep track of uncached and cached ports separately.Gabe Black
2010-11-08ARM: Add full-system regressionsAli Saidi
2010-08-20regress: Regression tester updatesBrad Beckmann
2010-08-17sim: fail on implicit creation of orphans via portsSteve Reinhardt
2010-03-21ruby: Regression updates for new ruby config locationsBrad Beckmann
2010-02-23cache: Make caches sharing aware and add occupancy stats.Lisa Hsu
2010-01-29m5: Regression Tester UpdateBrad Beckmann
2010-01-29ruby: memtest-ruby updated to the new config systemBrad Beckmann
2010-01-25config: changed default ruby config file for regressionDerek Hower
2010-01-19mergeDerek Hower
2009-11-18m5: refreshed the ruby memtest regression statsBrad Beckmann
2009-11-18ruby: included ruby config parameter ports per coreBrad Beckmann
2009-11-18ruby: Support for merging ALPHA_FS and rubyBrad Beckmann
2009-09-22python: Move more code into m5.util allow SCons to use that code.Nathan Binkert
2009-09-11ruby: cleaned up unified MESI/MOESI configurationDerek Hower
2009-07-06ruby: Fix RubyMemory to work with the newer ruby.Nathan Binkert
2009-05-12inorder-regress: missing regress config fileKorey Sewell
2009-05-11ruby: Set up Ruby regression tests.Steve Reinhardt
2008-07-16mem: use single BadAddr responder per system.Steve Reinhardt
2008-10-20Regression: Add single and dual boot O3 regressions. They both take about 8 m...Ali Saidi
2007-08-10Regression: Add an I/O Cache to the full system regressions that have a cache.Ali Saidi
2007-06-30Get rid of remaining traces of obsolete CoherenceProtocol object.Steve Reinhardt
2007-05-19PhysicalMemory has vector of uniform ports instead of one special one.Steve Reinhardt
2007-05-10remove hit_latency and make latency do the right thingAli Saidi
2007-04-22Update configs to set the CPU clock properly.Kevin Lim
2007-03-23Merge ktlim@zizzer:/bk/newmemKevin Lim
2007-03-23A couple of minor fixes.Kevin Lim
2007-03-06Move all of the parameters of the Root SimObject so they areNathan Binkert
2007-03-03add a sparc fs regressionAli Saidi
2007-02-06Add short memtest run to quick regressions.Steve Reinhardt
2006-12-01change this to be a quick one so that it's in the regressions every night - i...Lisa Hsu
2006-12-01add a simple netperf-stream test to the long tests.Lisa Hsu
2006-10-31Remove mem parameter. Now the translating port asks the CPU's dcache's peer ...Kevin Lim
2006-10-19Fix corner case on assertion.Ron Dreslinski
2006-10-17Enable MP systems via cmd-line flag in fs.py.Steve Reinhardt
2006-10-11Interesting memtest finally.Ron Dreslinski
2006-10-10Merge zizzer:/z/m5/Bitkeeper/newmemRon Dreslinski
2006-10-10Fix several bugs pertaining to upgrades/mem leaks.Ron Dreslinski
2006-10-09Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-10-09Update configs for cpu_idRon Dreslinski
2006-10-09Make memtest work with 8 memtestersRon Dreslinski
2006-10-09Update the Memtester, commit a config file/test for it.Ron Dreslinski
2006-10-08Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing)Steve Reinhardt
2006-10-08Clean up configs.Kevin Lim
2006-10-05Fixes for functional accesses to use the snoop path.Ron Dreslinski
2006-10-05First pass at snooping stuff that compiles and doesn't break.Ron Dreslinski
2006-09-01Add o3-timing configuration for ALPHA_SE "Hello world" tests.Steve Reinhardt
2006-08-21Merge zizzer:/z/m5/Bitkeeper/newmemRon Dreslinski
2006-08-18Add caches in, fix cpu.mem paramSteve Reinhardt
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