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AgeCommit message (Collapse)Author
2011-04-04ARM: Update stats for previous changes.Ali Saidi
2011-04-04O3: Update stats for memory order violation checking patch.Ali Saidi
2011-03-17ARM: Update stats for the previous changes and add ARM_FS/O3 regression.Ali Saidi
2011-02-23ARM: Update regression tests for preceeding changes.Ali Saidi
2011-02-07Stats: Re update stats.Gabe Black
2011-01-18ARM/O3: Add regressions for ARM w/ O3 CPU.Ali Saidi
2010-11-08ARM: Update SE stats for TLB stats additionsAli Saidi
2010-11-08ARM: Add full-system regressionsAli Saidi
2010-09-21stats: update stats for previous csetSteve Reinhardt
Coherence protocol change basically got rid of UpgradeReqs in L2 caches, other minor related cache stat changes.
2010-09-09stats: update stats for preceding coherence changesSteve Reinhardt
Because the handling of the E state for multilevel caches has changed, stats are affected for any non-ruby config with caches, even uniprocessor simple CPU.
2010-08-25ARM: Update regression tests for ldr/str microcode changes.Ali Saidi
2010-08-17tests: update reference config.ini files for previous csetSteve Reinhardt
Rename 'responder_set' to 'use_default_range'.
2010-07-27ARM: Add regression testsAli Saidi