gem5 - gem5

Age	Commit message (Collapse)	Author
2011-12-01	imported patch ext/stats_updates.patch	Ali Saidi
	--HG-- extra : rebase_source : 4697ba9eb1ca8c67fe0915fb8340d7d4ae94caba
2011-11-30	SPARC: update SE stats for FP fix	Ali Saidi
	--HG-- extra : rebase_source : 954a009a9f8eef6cae6050ee99f264e0fb456f85
2011-11-17	Regression: Update statistics for x86 long regression tests	Nilay Vaish
	This patch updates reference statistics for the regression tests. This update was necessitated by a recent change in behavior of some instructions in the x86 architecture.
2011-09-13	O3: Update stats for new ordering fix.	Ali Saidi

2011-08-19	StoreSet: Update stats for store-set clearing	Ali Saidi

2011-08-19	O3: Update stats for LSQ changes.	Ali Saidi

2011-07-10	O3: Update stats for fetch and bp changes.	Ali Saidi

2011-07-02	Stats: Update stats for the x86 store fault fix.	Gabe Black

2011-06-20	alpha:o3:simple: update simout/err files	Korey Sewell
	A few prior changesets have changed the gem5 output in a way that wont cause errors but may be confusing for someone trying to debug the regressions. Ones that I caught were: - no more "warn: <hash address" - typo in the ALPHA Prefetch unimplemented warning Additionaly, the last updated stats changes rearrange the ordering of the stats output even though they are still correct stats (gem5 is smart enough to detect this). All the regressions pass w/the same stats even though it looks like they are being changed.
2011-06-19	inorder: update SE regressions	Korey Sewell

2011-06-12	sparc: update long regressions	Korey Sewell

2011-05-23	Stats: Update stats for minor O3 changes below.	Ali Saidi

2011-05-13	ARM: Fix up stats for previous changes to condition codes	Ali Saidi

2011-05-04	O3/ARM: Update stats for recent changes.	Ali Saidi

2011-04-22	tests: updates for stat name change	Nathan Binkert

2011-04-19	tests: update stats for name changes	Nathan Binkert

2011-04-12	ARM: Fix stats for ARM_SE checkpoint restore fix.	Ali Saidi
	Register reads/writes done in startup() count against the stats while they don't count if done in initState().
2011-04-04	ARM: Update stats for previous changes.	Ali Saidi

2011-04-04	O3: Update stats for memory order violation checking patch.	Ali Saidi

2011-03-17	ARM: Update stats for the previous changes and add ARM_FS/O3 regression.	Ali Saidi

2011-02-23	ARM: Update regression tests for preceeding changes.	Ali Saidi

2011-02-18	m5: merge inorder/release-notes/make_release changes	Korey Sewell

2011-02-18	inorder: regr-update: reduce dynamic mem. use to speedup sims	Korey Sewell
	previous changesets took a closer look at memory mgmt in the inorder model and sought to avoid dynamic memory mgmt (for access to pipeline resources) as much as possible. For the regressions that were run, the sims are about 2x speedup from changeset 7726 which is the last change since the recent commits in Feb. (note: these regressions now are 4-issue CPUs instead of just 1-issue)
2011-02-13	X86: Update stats for the improved branch detection/prediction.	Gabe Black

2011-02-13	X86: Update stats now that the dest reg isn't read unnecessarily to set flags.	Gabe Black

2011-02-13	X86: Update stats for the reduced register reads.	Gabe Black

2011-02-12	inorder:regress: host-inst-rate improved ~58%	Korey Sewell
	there are still only a few inorder benchmark but for the lengthier benchmarks (twolf and vortext) the latest changes to how instruction scheduling (how instructions figure out what they want to do on each pipeline stage in the inorder model) were able to improve performance by a nice amount... The latest results for the inorder model process about 100k insts/second (note: 58% is over the last time run on 64-bit pool machines at UM)
2011-02-07	Stats: Re update stats.	Gabe Black

2011-02-05	X86: Add o3 regressions in SE mode.	Gabe Black
	Exclude bzip2 for now. It works, it just takes too long to run.
2011-02-04	imported patch regression_updates	Korey Sewell

2011-02-02	Stats: Update the x86 stats to reflect changing stupd to a store and update.	Gabe Black

2011-01-18	ARM/O3: Add regressions for ARM w/ O3 CPU.	Ali Saidi

2011-01-18	Stats: Update stats for previous set of patches.	Ali Saidi

2010-11-15	Regressions: Update regressions for SIMD opclass changes	Ali Saidi

2010-11-08	ARM: Update SE stats for TLB stats additions	Ali Saidi

2010-11-08	ARM/Alpha/Cpu: Stats change for prefetchs to be more like normal loads.	Ali Saidi

2010-09-21	stats: update stats for previous cset	Steve Reinhardt
	Coherence protocol change basically got rid of UpgradeReqs in L2 caches, other minor related cache stat changes.
2010-09-09	stats: update stats for preceding coherence changes	Steve Reinhardt
	Because the handling of the E state for multilevel caches has changed, stats are affected for any non-ruby config with caches, even uniprocessor simple CPU.
2010-08-25	ARM: Update regression tests for ldr/str microcode changes.	Ali Saidi

2010-08-17	tests: update reference config.ini files for previous cset	Steve Reinhardt
	Rename 'responder_set' to 'use_default_range'.
2010-07-27	ARM: Add regression tests	Ali Saidi

2010-06-25	inorder: update regressions from RAS fix	Korey Sewell

2010-06-24	inorder: update regressions	Korey Sewell

2010-06-23	inorder: update regressions	Korey Sewell

2010-06-06	tests: Update O3 ref outputs to reflect Lisa's dist format change.	m5test

2010-05-13	BPRED: Update regressions for tournament predictor fix.	Ali Saidi

2010-05-03	X86: Update stats for the updated auxilliary vectors.	Gabe Black

2010-04-11	inorder: update regressions for fwd-ing patch	Korey Sewell

2010-03-27	inorder: update twolf/vortex regressions	Korey Sewell

2010-03-23	inorder: update twolf regression	Korey Sewell