gem5 - gem5

Age	Commit message (Collapse)	Author
2016-09-16	tests, arm: Make switcheroo and checkpoint tests functional	Andreas Sandberg
	Switcheroo and checkpoint tests should generally be considered to be successful if they run to completion. Remove all reference output files from the switcheroo and checkopint tests to make them purely functional. Change-Id: I70b47853bd662b7a33716d9e0d2154b16077f9dc Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
2016-08-02	stats: update references	Curtis Dunham

2016-07-21	stats: update references	Curtis Dunham

2016-03-16	stats: overdue updates to long regressions	Steve Reinhardt

2015-12-05	stats: Update to reflect changes to PCI handling	Andreas Sandberg

2015-12-04	stats: Update to reflect changes to RealView platform code	Andreas Sandberg

2015-09-15	stats: updates due to recent changesets including d0934b57735a	Nilay Vaish

2015-08-07	stats: Update ARM stats to include programmable oscillators	Andreas Sandberg

2015-07-31	stats: Update switcheroo reference stats	Andreas Sandberg
	The Minor draining fixes affect perturb the timing slightly since it affects how the simulator is drained. Update reference statistics to reflect this expected change.
2015-07-30	stats: Bump stats after Minor switcheroo inclusion	Andreas Sandberg

2015-04-22	stats: update for previous changeset	Steve Reinhardt
	Very small differences in IQ-specific O3 stats.
2015-04-20	stats: update a few stats from long O3 runs	Steve Reinhardt
	Very small changes to iew.predictedNotTakenIncorrect and iew.branchMispredicts. Looks like similar updates were committed on April 3 (changeset 235ff1c046df), but only for the quick tests.
2014-11-03	tests: Update stats no match.	Ali Saidi
	Bootloader I had on my sytem was an older version with a couple of instruction differences.
2014-10-29	tests: Update regressions for the new kernels and various preceeding fixes.	Ali Saidi

2014-06-22	stats: update for O3 changes	Steve Reinhardt
	Mostly small differences in total ticks, but O3 stall causes shifted significantly. 30.eon does speed up by ~6% on Alpha and ARM, and 50.vortex by 4.5% on ARM. At the other extreme, X86 70.twolf is 0.8% slower.
2014-01-24	stats: update stats for ARMv8 changes	Ali Saidi

2014-01-24	stats: update stats for cache occupancy and clock domain changes	Ali Saidi

2013-10-16	test: update stats	Steve Reinhardt
	Update stats for recent changes. Mostly minor changes in register access stats due to addition of new cc register type and slightly different (and more accurate) classification of int vs. fp register accesses.
2013-09-28	tests: update reference outputs	Steve Reinhardt
	Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-03-29	regressions: updates due to changes to o3 cpu, x86 memory map	Nilay Vaish

2013-03-27	regressions: update due to cache latency fix	Nilay Vaish

2013-01-24	regressions: update stats due to branch predictor changes	Nilay Vaish
	The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-07	stats: update stats for previous changes.	Ali Saidi

2013-01-07	tests: Add CPU switching tests	Andreas Sandberg
	This changeset adds a set of tests that stress the CPU switching code. It adds the following test configurations: * tsunami-switcheroo-full -- Alpha system (atomic, timing, O3) * realview-switcheroo-atomic -- ARM system (atomic<->atomic) * realview-switcheroo-timing -- ARM system (timing<->timing) * realview-switcheroo-o3 -- ARM system (O3<->O3) * realview-switcheroo-full -- ARM system (atomic, timing, O3) Reference data is provided for the 10.linux-boot test case. All of the tests trigger a CPU switch once per millisecond during the boot process. The in-order CPU model was not included in any of the tests as it does not support CPU handover.