index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
tests
/
long
/
se
/
20.parser
/
ref
/
x86
/
linux
/
o3-timing
Age
Commit message (
Expand
)
Author
2015-11-06
stats: Update stats to match cache changes
Andreas Hansson
2015-09-25
stats: Update stats to reflect snoop-filter changes
Andreas Hansson
2015-09-15
stats: updates due to recent changesets including d0934b57735a
Nilay Vaish
2015-08-05
stats: Reflect current behaviour
Andreas Hansson
2015-07-30
stats: Bump stats to match current behaviour
Andreas Hansson
2015-07-18
stats: x86: updates due to patch on vex
Nilay Vaish
2015-07-05
stats: x86: update stats missed out on in preivous changeset
Nilay Vaish
2015-07-03
stats: Update stats for cache, crossbar and DRAM changes
Andreas Hansson
2015-05-05
stats: Update stats to reflect cache changes
Andreas Hansson
2015-04-29
stats: x86: updates due to change in div latency
Nilay Vaish
2015-04-22
stats: update for previous changeset
Steve Reinhardt
2015-04-14
stats: x86: changes due to recent patches
Nilay Vaish
2015-03-09
stats: changes to due to recent set of patches
Nilay Vaish
2015-03-02
stats: Update stats to reflect cache and interconnect changes
Andreas Hansson
2015-01-10
stats: changes due to recent changesets.
Nilay Vaish
2014-12-23
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes
Andreas Hansson
2014-10-20
stats: updates due to previous mmap and exit_group patches.
Nilay Vaish
2014-10-11
stats: updates due to changes to x86, stale configs.
Nilay Vaish
2014-10-09
stats: Add DRAM power statistics to reference output
Andreas Hansson
2014-09-20
stats: Bump stats for filter, crossbar and config changes
Andreas Hansson
2014-09-03
stats: Update stats for CPU and cache changes
Andreas Hansson
2014-09-01
stats: updates due to recent ruby and x86 changes
Nilay Vaish
2014-06-22
stats: update for O3 changes
Steve Reinhardt
2014-05-24
stats: changes due to recent o3 patch.
Nilay Vaish
2014-05-09
stats: Bump stats for the fixes, and mostly DRAM controller changes
Andreas Hansson
2014-03-23
stats: Update stats for DRAM changes
Andreas Hansson
2014-02-16
stats: updates due to branch predictor warming
Nilay Vaish
2014-01-24
stats: update stats for cache occupancy and clock domain changes
Ali Saidi
2013-11-26
stats: updates due to changes to ticksToCycles()
Nilay Vaish
2013-11-01
stats: Bump stats to match DRAM controller changes
Andreas Hansson
2013-10-16
test: update stats
Steve Reinhardt
2013-10-02
stats: Update x86 stats after x87 fixes
Andreas Sandberg
2013-09-28
tests: update reference outputs
Steve Reinhardt
2013-08-19
stats: Cumulative stats update
Andreas Hansson
2013-06-27
stats: Update stats for monitor, cache and bus changes
Andreas Hansson
2013-06-24
stats: Bump x86 stats
Andreas Hansson
2013-05-30
stats: Update the stats to reflect bus and memory changes
Andreas Hansson
2013-05-21
x86, regressions: updates stats
Nilay Vaish
2013-04-23
x86, stats: updates due to lret bugfix
Nilay Vaish
2013-03-27
regressions: update due to cache latency fix
Nilay Vaish
2013-03-26
stats: Update stats to reflect bus retry changes
Andreas Hansson
2013-03-11
regressions: x86: stats updates due to new x87 insts
Nilay Vaish
2013-03-01
stats: Update stats to reflect SimpleDRAM changes
Andreas Hansson
2013-01-31
stats: Update stats for regressions using SimpleDDR3
Andreas Hansson
2013-01-24
regressions: update stats due to branch predictor changes
Nilay Vaish
2013-01-07
stats: update stats for previous changes.
Ali Saidi
2012-12-30
x86 regressions: stats update due to new x87 instructions
Nilay Vaish
2012-11-02
update stats for preceeding changes
Ali Saidi
2012-10-30
stats: Update stats for unified cache configuration
Andreas Hansson
2012-10-25
stats: Update stats to reflect use of SimpleDRAM
Andreas Hansson
[next]