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2014-09-01stats: updates due to recent ruby and x86 changesNilay Vaish
Also updates many out of date config files.
2014-07-28stats: Bump stats for the regressions using the minor CPUAndreas Hansson
Updating the stats to match the current behaviour.
2014-07-23cpu: Minor CPU add regression tests for ARM and ALPHAAndrew Bardsley
This patch adds regression tests results and test harnesses for the Minor CPU on ARM and ALPHA.
2014-07-19stats: update for syscall DPRINTF changeSteve Reinhardt
Only printing one rather than two args for the ignored syscall warning means the count of register accesses has changed on a few runs. Oddly only Alpha Tru64 seems to have any ignored syscalls in the regression tests.
2014-06-22stats: update for O3 changesSteve Reinhardt
Mostly small differences in total ticks, but O3 stall causes shifted significantly. 30.eon does speed up by ~6% on Alpha and ARM, and 50.vortex by 4.5% on ARM. At the other extreme, X86 70.twolf is 0.8% slower.
2014-05-24stats: changes due to recent o3 patch.Nilay Vaish
2014-05-23stats: changes due to o3 cpu and ruby message buffer patchesNilay Vaish
2014-05-12tests: update t1000 & pc-switcheroo-full statsSteve Reinhardt
committed reference config.json files too
2014-05-09stats: Bump stats for the fixes, and mostly DRAM controller changesAndreas Hansson
2014-04-22stats: updates for pc-switcheroo-full due to o3 smt fixAndreas Hansson
2014-04-19stats: updates due to o3 smt fixNilay Vaish
+ changes to one ruby regression config.ini file.
2014-03-23stats: Update stats for DRAM changesAndreas Hansson
This patch updates the stats to reflect the changes to the DRAM controller.
2014-03-20stats: updates due to changes to ruby config scriptsNilay Vaish
These updates to ruby regression stats are due to renaming piobus to iobus and dropping piobus in the se mode.
2014-02-23stats: updates due to changes to ruby pio access handlingNilay Vaish
2014-02-19arm: Bump stats after FS config script updateAndreas Hansson
This patch updates the stats to reflect the change in kernel options needed for armv8 (but used for all FS regressions).
2014-02-16stats: updates due to branch predictor warmingNilay Vaish
2014-01-27stats: update sparc fs statsNilay Vaish
2014-01-24stats: update stats for ARMv8 changesAli Saidi
2014-01-24stats: update stats for cache occupancy and clock domain changesAli Saidi
2014-01-10stats: updates due to changes to rubyNilay Vaish
2014-01-04ruby: rename MESI_CMP_directory to MESI_Two_LevelNilay Vaish
This is because the next patch introduces a three level hierarchy. --HG-- rename : build_opts/ALPHA_MESI_CMP_directory => build_opts/ALPHA_MESI_Two_Level rename : build_opts/X86_MESI_CMP_directory => build_opts/X86_MESI_Two_Level rename : configs/ruby/MESI_CMP_directory.py => configs/ruby/MESI_Two_Level.py rename : src/mem/protocol/MESI_CMP_directory-L1cache.sm => src/mem/protocol/MESI_Two_Level-L1cache.sm rename : src/mem/protocol/MESI_CMP_directory-L2cache.sm => src/mem/protocol/MESI_Two_Level-L2cache.sm rename : src/mem/protocol/MESI_CMP_directory-dir.sm => src/mem/protocol/MESI_Two_Level-dir.sm rename : src/mem/protocol/MESI_CMP_directory-dma.sm => src/mem/protocol/MESI_Two_Level-dma.sm rename : src/mem/protocol/MESI_CMP_directory-msg.sm => src/mem/protocol/MESI_Two_Level-msg.sm rename : src/mem/protocol/MESI_CMP_directory.slicc => src/mem/protocol/MESI_Two_Level.slicc rename : tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/config.ini => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/config.ini rename : tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/ruby.stats => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/ruby.stats rename : tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simerr => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/simerr rename : tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simout => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/simout rename : tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/stats.txt => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/stats.txt rename : tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/system.pc.com_1.terminal => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/system.pc.com_1.terminal rename : tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/config.ini => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/config.ini rename : tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/ruby.stats rename : tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/simerr rename : tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/simout rename : tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/stats.txt rename : tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/config.ini rename : tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/ruby.stats rename : tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/simerr rename : tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/simout rename : tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/stats.txt rename : tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/config.ini rename : tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/ruby.stats rename : tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/simerr rename : tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/simout rename : tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/stats.txt rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/config.ini rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/ruby.stats rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simerr => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/simerr rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/simout rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/stats.txt
2013-12-26stats: updates due to bug fixed in mesi coherence protocolNilay Vaish
2013-11-26stats: updates due to changes to ticksToCycles()Nilay Vaish
2013-11-01stats: Bump stats to match DRAM controller changesAndreas Hansson
This patch encompasses all the stats updates needed to reflect the changes to the DRAM controller.
2013-10-16test: update statsSteve Reinhardt
Update stats for recent changes. Mostly minor changes in register access stats due to addition of new cc register type and slightly different (and more accurate) classification of int vs. fp register accesses.
2013-10-09stats: Bump pc-simple-timing-ruby statsAndreas Hansson
This patch simply brings the stats for the pc-simple-timing-ruby regression up to date. The particular regression seems to give different results on different systems unfortunately, and this update reflects the current behaviour on zizzer.
2013-10-02stats: Update x86 stats after x87 fixesAndreas Sandberg
The updates to the x87 caused the stats for several regressions to change. This was mainly caused by the addition of a working 32-bit and 80-bit FP load instruction and xsave support.
2013-09-28tests: update reference outputsSteve Reinhardt
Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-15stats: update sparc fs due to recent changes to memory class.Nilay Vaish
2013-09-06stats: ruby: updates due to recent changes.Nilay Vaish
2013-08-20stats: update ruby.stats, config.ini files for x86 fs testNilay Vaish
2013-08-19stats: Cumulative stats updateAndreas Hansson
This patch updates the stats to reflect the: 1) addition of the internal queue in SimpleMemory, 2) moving of the memory class outside FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying burst size and interface width for the DRAM instead of relying on cache-line size, 5) performing merging in the DRAM controller write buffer, and 6) fixing how idle cycles are counted in the atomic and timing CPU models. The main reason for bundling them up is to minimise the changeset size.
2013-07-02regressions: update a couple stats.txtNilay Vaish
The statistics for 30.eio-mp, pc-simple-timing-ruby tests are being updated to incorporate the changes due to recent patches.
2013-06-27stats: Update stats for monitor, cache and bus changesAndreas Hansson
This patch removes the sparse histogram total from the CommMonitor stats. It also bumps the stats after the unit fixes in the atomic cache access. Lastly, it updates the stats to match the new port ordering. All numbers are the same, and the only thing that changes is which master corresponds to what port index.
2013-06-27config: Add a BaseSESystem builder for re-use in regressionsAndreas Hansson
This patch extends the existing system builders to also include a syscall-emulation builder. This builder is deployed in all syscall-emulation regressions that do not involve Ruby, i.e. o3-timing, simple-timing and simple-atomic, as well as the multi-processor regressions o3-timing-mp, simple-timing-mp and simple-atomic-mp (the latter are only used by SPARC at this point). The values chosen for the cache sizes match those that were used in the existing config scripts (despite being on the large side). Similarly, a mem_class parameter is added to the builder base class to enable simple-atomic to use SimpleMemory and o3-timing to use the default DDR3 configuration. Due to the different order the ports are connected, the bus stats get shuffled around for the multi-processor regressions. A separate patch bumps the port indices. Besides this, all behaviour is exactly the same.
2013-06-27tests: Prune 00.gzip from the regressionsAndreas Hansson
This patch prunes the 00.gzip regressions with the main motivation being that it adds little (or no) coverage and requires a substantial amount of run time. A complete regression run, including compilation from a clean repo, is almost 20% faster(!).
2013-06-25stats: updates due to changes to stat collection in rubyNilay Vaish
2013-06-24stats: Bump x86 statsAndreas Hansson
This patch bumps the x86 stats to reflect the recent fixes.
2013-06-10stats: updates due to changes to rubyNilay Vaish
Ruby's controller statistics have been mostly moved to stats.txt now. Plus stats.txt for solaris/t1000-simple-atomic and arm/20.parser are also being updated.
2013-05-30stats: Update the stats to reflect bus and memory changesAndreas Hansson
This patch updates the stats to reflect the addition of the bus stats, and changes to the bus layers. In addition it updates the stats to match the addition of the static pipeline latency of the memory conotroller and the addition of a stat tracking the bytes per activate.
2013-05-21x86, regressions: updates statsNilay Vaish
This is due to op class, function call, walker patches.
2013-05-21stats: updates statistics for ruby regressionsNilay Vaish
2013-04-23x86: regressions: add switcher full testNilay Vaish
2013-04-23x86, stats: updates due to lret bugfixNilay Vaish
2013-04-22stats: Update stats for O3 switching fix.Ali Saidi
2013-04-19stats: Update stats for ldr_ret_uop (changeset 35198406dd72)Andreas Hansson
This patch merely bumps the stats to match the changes introduced in changeset 35198406dd72.
2013-04-16stats: Bump the vortex stats to match latest behaviourAndreas Hansson
This patch bumps the stats for the failing vortex o3 regression.
2013-03-29regressions: updates due to changes to o3 cpu, x86 memory mapNilay Vaish
2013-03-27regressions: update due to cache latency fixNilay Vaish
2013-03-26stats: Update stats for cache retry event checkAndreas Hansson
This patch updates the stats for the affected stats. All the changes are minimal (in the <0.01% range).
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-15 16:58:35 +0000