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AgeCommit message (Expand)Author
2013-03-11regressions: x86: stats updates due to new x87 instsNilay Vaish
2013-03-04stats: update patches for branch predictor and fetch updates.Ali Saidi
2013-03-01stats: Update stats to reflect SimpleDRAM changesAndreas Hansson
2013-02-19stats: more zizzer stats funAli Saidi
2013-02-15stats: update regressions for o3 changes in renaming and translation.Ali Saidi
2013-02-10regressions: update stats due to changes to rubyNilay Vaish
2013-01-31stats: Update stats for regressions using SimpleDDR3Andreas Hansson
2013-01-28stats: Fix naming (BPredUnit to branchPred) for 20.parser ARM o3Andreas Hansson
2013-01-24regressions: update stats due to branch predictor changesNilay Vaish
2013-01-15x86 regressions: updates due to new instructions and cpuidNilay Vaish
2013-01-14regressions: update stats due to changes in ruby obj hierarchyNilay Vaish
2013-01-14stats: Bump failing x86 regression statsAndreas Hansson
2013-01-08stats: update stats for previous six changesAli Saidi
2013-01-07stats: update stats for previous changes.Ali Saidi
2013-01-07tests: Add CPU switching testsAndreas Sandberg
2013-01-04regressions: stats update due to decoder changesNilay Vaish
2012-12-30x86 regressions: stats update due to new x87 instructionsNilay Vaish
2012-12-12arm regressions: updates to config.ini, terminal filesNilay Vaish
2012-12-11regressions: stats update due to stats from ruby prefetcherNilay Vaish
2012-11-02update stats for preceeding changesAli Saidi
2012-10-30stats: Update stats for unified cache configurationAndreas Hansson
2012-10-27regressions: update stats for ruby fs testNilay Vaish
2012-10-25stats: Update the stats to reflect the 1GHz default system clockAndreas Hansson
2012-10-25stats: Update stats to reflect use of SimpleDRAMAndreas Hansson
2012-10-23stats: Update stats for DMA port sendAndreas Hansson
2012-10-23stats: Update t1000 stats to match recent changesAndreas Hansson
2012-10-15Stats: Update stats for cache timings in cyclesAndreas Hansson
2012-10-15Stats: Update stats for new default L1-to-L2 bus clock and widthAndreas Hansson
2012-10-15Stats: Update stats for use of two-level builderAndreas Hansson
2012-10-02Regression Tests: Update statisticsNilay Vaish
2012-09-25ARM: update stats for bp and squash fixes.Ali Saidi
2012-09-18Stats: Update stats to reflect SimpleMemory bandwidthAndreas Hansson
2012-09-13Stats: Remove the reference stats that are no longer presentAndreas Hansson
2012-09-11x86 Regressions: Update stats due to register predicationNilay Vaish
2012-09-10Regression: Updates due to changes to Ruby memory controllerNilay Vaish
2012-09-10Device: Update stats for PIO and PCI latency changeAndreas Hansson
2012-08-28Checker: Bump the realview-o3-checker regressionAndreas Hansson
2012-08-25Regression: updates ruby.stats due to change in virtual networkNilay Vaish
2012-08-15stats: Update stats for syscall emulation Linux kernel changes.Ali Saidi
2012-07-30stats: revert pc-simple-timing-ruby-MESI_CMP_directory to before last updateAli Saidi
2012-07-27stats: update stats for icache change not allowing dirty dataAli Saidi
2012-07-22Regression: Update stats due to changes to x86 cpuid instructionNilay Vaish
2012-07-12Regression: update ruby.stats fileNilay Vaish
2012-07-09Stats: Updates due to bus changesAndreas Hansson
2012-06-29Stats: Update stats for RAS and LRU fixes.Ali Saidi
2012-06-05all: Update stats for memory per master and total fix.Ali Saidi
2012-06-04X86: Update stats for the CPUID change.Gabe Black
2012-05-09Stats: Fix stats to match output after changeset 8800b05e1cb3Andreas Hansson
2012-05-22X86 Regression: update stats due to cc register splitNilay Vaish
2012-05-10ARM: update stats for clock frequency fix.Ali Saidi
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