gem5 - gem5

Age	Commit message (Collapse)	Author
2016-09-16	tests, arm: Make switcheroo and checkpoint tests functional	Andreas Sandberg
	Switcheroo and checkpoint tests should generally be considered to be successful if they run to completion. Remove all reference output files from the switcheroo and checkopint tests to make them purely functional. Change-Id: I70b47853bd662b7a33716d9e0d2154b16077f9dc Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
2016-07-21	stats: update references	Curtis Dunham

2016-06-02	stats: Update to match ARM ISA changes	Andreas Sandberg

2016-04-08	stats: update stats for thermals, indirect BP	Curtis Dunham

2014-11-03	tests: Update stats no match.	Ali Saidi
	Bootloader I had on my sytem was an older version with a couple of instruction differences.
2014-10-29	tests: Update regressions for the new kernels and various preceeding fixes.	Ali Saidi

2014-01-24	stats: update stats for ARMv8 changes	Ali Saidi

2014-01-24	stats: update stats for cache occupancy and clock domain changes	Ali Saidi

2013-09-28	tests: update reference outputs	Steve Reinhardt
	Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-01-07	tests: Add CPU switching tests	Andreas Sandberg
	This changeset adds a set of tests that stress the CPU switching code. It adds the following test configurations: * tsunami-switcheroo-full -- Alpha system (atomic, timing, O3) * realview-switcheroo-atomic -- ARM system (atomic<->atomic) * realview-switcheroo-timing -- ARM system (timing<->timing) * realview-switcheroo-o3 -- ARM system (O3<->O3) * realview-switcheroo-full -- ARM system (atomic, timing, O3) Reference data is provided for the 10.linux-boot test case. All of the tests trigger a CPU switch once per millisecond during the boot process. The in-order CPU model was not included in any of the tests as it does not support CPU handover.