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AgeCommit message (Expand)Author
2014-10-30arm, tests: Forgot the system.terminal files for the new regressions.Ali Saidi
2014-10-29arm, tests: Add 64-bit ARM regression testsAli Saidi
2014-10-29tests: Update regressions for the new kernels and various preceeding fixes.Ali Saidi
2014-10-11stats: updates due to changes to x86, stale configs.Nilay Vaish
2014-10-09stats: Add DRAM power statistics to reference outputAndreas Hansson
2014-09-20stats: Bump stats for filter, crossbar and config changesAndreas Hansson
2014-09-03stats: Update stats for CPU and cache changesAndreas Hansson
2014-09-01stats: updates due to recent ruby and x86 changesNilay Vaish
2014-05-09stats: Bump stats for the fixes, and mostly DRAM controller changesAndreas Hansson
2014-03-23stats: Update stats for DRAM changesAndreas Hansson
2014-02-19arm: Bump stats after FS config script updateAndreas Hansson
2014-02-16stats: updates due to branch predictor warmingNilay Vaish
2014-01-24stats: update stats for ARMv8 changesAli Saidi
2014-01-24stats: update stats for cache occupancy and clock domain changesAli Saidi
2013-11-26stats: updates due to changes to ticksToCycles()Nilay Vaish
2013-11-01stats: Bump stats to match DRAM controller changesAndreas Hansson
2013-11-01stats: Bump stats after shifting to SimpleMemoryAndreas Hansson
2013-10-16test: update statsSteve Reinhardt
2013-10-02stats: Update x86 stats after x87 fixesAndreas Sandberg
2013-09-28tests: update reference outputsSteve Reinhardt
2013-08-19stats: Cumulative stats updateAndreas Hansson
2013-06-27stats: Update stats for monitor, cache and bus changesAndreas Hansson
2013-05-30stats: Update the stats to reflect bus and memory changesAndreas Hansson
2013-05-21x86, regressions: updates statsNilay Vaish
2013-04-23x86, stats: updates due to lret bugfixNilay Vaish
2013-04-22stats: Update stats for O3 switching fix.Ali Saidi
2013-03-29regressions: updates due to changes to o3 cpu, x86 memory mapNilay Vaish
2013-03-27regressions: update due to cache latency fixNilay Vaish
2013-03-26stats: Update stats for cache retry event checkAndreas Hansson
2013-03-26stats: Update stats to reflect bus retry changesAndreas Hansson
2013-03-01stats: Update stats to reflect SimpleDRAM changesAndreas Hansson
2013-01-31stats: Update stats for regressions using SimpleDDR3Andreas Hansson
2013-01-24regressions: update stats due to branch predictor changesNilay Vaish
2013-01-15x86 regressions: updates due to new instructions and cpuidNilay Vaish
2013-01-07stats: update stats for previous changes.Ali Saidi
2013-01-07tests: Add CPU switching testsAndreas Sandberg
2012-12-06regression test: update a couple of config.ini filesNilay Vaish
2012-10-25stats: Update the stats to reflect the 1GHz default system clockAndreas Hansson
2012-10-25stats: Update stats to reflect use of SimpleDRAMAndreas Hansson
2012-10-23stats: Update stats for DMA port sendAndreas Hansson
2012-10-15Stats: Update stats for cache timings in cyclesAndreas Hansson
2012-10-15Stats: Update stats for new default L1-to-L2 bus clock and widthAndreas Hansson
2012-10-15Stats: Update stats for use of two-level builderAndreas Hansson
2012-09-25ARM: update stats for bp and squash fixes.Ali Saidi
2012-09-24Stats: Update stats for twosys-tsunami after setting CPU clockAndreas Hansson
2012-09-18Stats: Update stats to reflect SimpleMemory bandwidthAndreas Hansson
2012-09-11x86 Regressions: Update stats due to register predicationNilay Vaish
2012-09-10Device: Update stats for PIO and PCI latency changeAndreas Hansson
2012-07-27stats: update stats for icache change not allowing dirty dataAli Saidi
2012-07-22Regression: Update stats due to changes to x86 cpuid instructionNilay Vaish
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