gem5 - gem5

Age	Commit message (Collapse)	Author
2016-12-05	stats: Update stats to reflect cache changes	Andreas Hansson

2016-11-30	tests: Regression stats updated for recent patches	Jason Lowe-Power

2016-10-19	stats: Update stats to reflect recent changes to floats	Andreas Hansson
	Mostly just splitting out the floats ops and corresponding reads/writes.
2016-10-13	stats: update references	Curtis Dunham

2016-08-12	stats: Update to match classic memory changes	Andreas Sandberg

2016-07-21	stats: update references	Curtis Dunham

2016-06-06	stats: Add power stats to test references	Andreas Sandberg
	Change-Id: Ic827213134b199446822f128b81d4a480e777fee
2016-05-31	stats: update and fix e273e86a873d	Curtis Dunham

2016-05-31	stats: update for snoop filter tweak	Curtis Dunham
	--HG-- extra : source : 2323557eb4f4866fa1ea1575a9f5969e0022adc1
2016-04-21	stats: Update stats to reflect cache changes	Andreas Hansson
	Removed unused stats, now counting WriteLineReq, and changed how uncacheable writes are handled while responses are outstanding.
2016-04-09	stats: Match current behaviour	Andreas Hansson
	Small changes to the branch predictor and BTB caused stats changes throughout.
2016-04-08	stats: update stats for thermals, indirect BP	Curtis Dunham

2016-03-17	stats: update stats for mmap() change.	Steve Reinhardt
	SE O3 runs see an additional reg read per mmap() call.
2016-02-10	stats: Update stats to reflect changes to cache and crossbar	Andreas Hansson

2016-01-22	stats: update stats to after GPU checkin	Tony Gutierrez

2015-12-12	stats: bump stats to reflect ruby tester changes	Anthony Gutierrez

2015-11-16	stats: updates due to recent chagnesets	Nilay Vaish

2015-11-16	stats: remove wb_penalized and wb_penalized_rate	Nilay Vaish

2015-11-06	stats: Update stats to match cache changes	Andreas Hansson

2015-09-25	stats: Update stats to reflect snoop-filter changes	Andreas Hansson

2015-09-15	stats: updates due to recent changesets including d0934b57735a	Nilay Vaish

2015-08-30	stats: updates due to recent changes.	Nilay Vaish

2015-07-04	stats: update stale config.ini files, eio and few other stats.	Nilay Vaish

2015-07-03	stats: Update stats for cache, crossbar and DRAM changes	Andreas Hansson
	This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-04-22	stats: update for previous changeset	Steve Reinhardt
	Very small differences in IQ-specific O3 stats.
2015-03-09	stats: changes to due to recent set of patches	Nilay Vaish

2015-03-02	stats: Update stats to reflect cache and interconnect changes	Andreas Hansson
	This is a bulk update of stats to match the changes to cache timing, interconnect timing, and a few minor changes to the o3 CPU.
2015-01-04	stats: changes due to recent changesets.	Nilay Vaish

2014-12-23	stats: Bump stats for decoder, TLB, prefetcher and DRAM changes	Andreas Hansson
	Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-10-20	stats: updates due to previous mmap and exit_group patches.	Nilay Vaish

2014-10-11	stats: updates due to changes to x86, stale configs.	Nilay Vaish

2014-10-09	stats: Add DRAM power statistics to reference output	Andreas Hansson

2014-09-20	stats: Bump stats for filter, crossbar and config changes	Andreas Hansson
	This patch bumps the stats to reflect the addition of the snoop filter and snoop stats, the change from bus to crossbar, and the updates to the ARM regressions that are now using a different CPU and cache configuration. Lastly, some minor changes are expected due to the activation cleanup of the CPUs.
2014-09-03	stats: Update stats for CPU and cache changes	Andreas Hansson
	This patch updates the stats to reflect the fixes and changes to the CPU (mainly the o3), and the caches.
2014-09-01	stats: updates due to recent ruby and x86 changes	Nilay Vaish
	Also updates many out of date config files.
2014-06-22	stats: update for O3 changes	Steve Reinhardt
	Mostly small differences in total ticks, but O3 stall causes shifted significantly. 30.eon does speed up by ~6% on Alpha and ARM, and 50.vortex by 4.5% on ARM. At the other extreme, X86 70.twolf is 0.8% slower.
2014-05-23	stats: changes due to o3 cpu and ruby message buffer patches	Nilay Vaish

2014-05-09	stats: Bump stats for the fixes, and mostly DRAM controller changes	Andreas Hansson

2014-03-23	stats: Update stats for DRAM changes	Andreas Hansson
	This patch updates the stats to reflect the changes to the DRAM controller.
2014-02-16	stats: updates due to branch predictor warming	Nilay Vaish

2014-01-24	stats: update stats for cache occupancy and clock domain changes	Ali Saidi

2014-01-10	stats: updates due to changes to ruby	Nilay Vaish

2013-11-26	stats: updates due to changes to ticksToCycles()	Nilay Vaish

2013-11-01	stats: Bump stats to match DRAM controller changes	Andreas Hansson
	This patch encompasses all the stats updates needed to reflect the changes to the DRAM controller.
2013-10-16	test: update stats	Steve Reinhardt
	Update stats for recent changes. Mostly minor changes in register access stats due to addition of new cc register type and slightly different (and more accurate) classification of int vs. fp register accesses.
2013-09-28	tests: update reference outputs	Steve Reinhardt
	Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-08-19	stats: Cumulative stats update	Andreas Hansson
	This patch updates the stats to reflect the: 1) addition of the internal queue in SimpleMemory, 2) moving of the memory class outside FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying burst size and interface width for the DRAM instead of relying on cache-line size, 5) performing merging in the DRAM controller write buffer, and 6) fixing how idle cycles are counted in the atomic and timing CPU models. The main reason for bundling them up is to minimise the changeset size.
2013-06-27	stats: Update stats for monitor, cache and bus changes	Andreas Hansson
	This patch removes the sparse histogram total from the CommMonitor stats. It also bumps the stats after the unit fixes in the atomic cache access. Lastly, it updates the stats to match the new port ordering. All numbers are the same, and the only thing that changes is which master corresponds to what port index.
2013-05-30	stats: Update the stats to reflect bus and memory changes	Andreas Hansson
	This patch updates the stats to reflect the addition of the bus stats, and changes to the bus layers. In addition it updates the stats to match the addition of the static pipeline latency of the memory conotroller and the addition of a stat tracking the bytes per activate.
2013-03-27	regressions: update due to cache latency fix	Nilay Vaish