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AgeCommit message (Expand)Author
2012-06-11Regression: Fix some bugs in simple-timing-mp-ruby.py.Marc Orr
2012-06-05all: Update stats for memory per master and total fix.Ali Saidi
2012-06-04X86: Update stats for the CPUID change.Gabe Black
2012-05-31Bus: Split the bus into a non-coherent and coherent busAndreas Hansson
2012-05-09Stats: Fix stats to match output after changeset 8800b05e1cb3Andreas Hansson
2012-05-27X86: Add a 32 bit hello world test binary.Gabe Black
2012-05-22X86 Regression: update stats due to cc register splitNilay Vaish
2012-05-10ARM: update stats for clock frequency fix.Ali Saidi
2012-05-09stats: update stats for no_value -> nanNathan Binkert
2012-05-03Regression: Move x86 fs ruby simulation from quick to longNilay Vaish
2012-04-30Regression: Stats update for X86 Ruby FS testNilay Vaish
2012-04-25Regression: Add a test for x86 timing full system ruby simulationNilay Vaish
2012-04-24X86: Update stats for the slightly changed TLB behavior.Gabe Black
2012-04-14Regression: Add ANSI colours to highlight test statusAndreas Hansson
2012-04-12Stats: Update with use of std::map for ordered iteration in RubyAndreas Hansson
2012-04-06regress: ruby random tester and hammer stats updatesBrad Beckmann
2012-04-06MOESI_hammer: fixed bug with single cpu + flushes, then modified the regressi...Brad Beckmann
2012-04-06MEM: Enable multiple distributed generalized memoriesAndreas Hansson
2012-03-28Config: Change the way options are addedNilay Vaish
2012-03-21ARM: Update stats for IT and conditional branch changesAli Saidi
2012-03-09ARM: Update stats for CBNZ fix.Ali Saidi
2012-03-09ARM: Update stats for valgrind fix and replace config.inis which are out of d...Ali Saidi
2012-03-09CheckerCPU: Make some basic regression tests for CheckerCPUGeoffrey Blake
2012-03-09cache: Allow main memory to be at disjoint address ranges.Ali Saidi
2012-03-08Fix the SPARC fs regression by adding a call to createInterruptController.Gabe Black
2012-03-06Stats: Update stats for changeset 8868Andreas Hansson
2012-03-02CPU: Check that the interrupt controller is created when neededAndreas Hansson
2012-03-02Stats: Fix the realview regression stats after nvmem moveAndreas Hansson
2012-02-29EIO: update stats (mostly order change, some renames)Steve Reinhardt
2012-02-14Script: Fix the scripts that use the num_cpus cache parameterAndreas Hansson
2012-02-13bp: fix up stats for changes to branch predictorAli Saidi
2012-02-13MEM: Introduce the master/slave port roles in the Python classesAndreas Hansson
2012-02-12tests: fix diff-out script for op/inst stat changes.Ali Saidi
2012-02-12stats: update stats for insts/ops and master id changesAli Saidi
2012-02-12mem: fix cache stats to use request ids correctlyDam Sunwoo
2012-02-12Regressions: Update stats due to change in MESI protocolNilay Vaish
2012-02-10Regressions: Update stats due to O3 CPU changesNilay Vaish
2012-01-30Merge with main repository.Gabe Black
2012-01-30Ruby: Connect system port in Ruby network testAndreas Hansson
2012-01-29Yet another merge with the main repository.Gabe Black
2012-01-28X86 Regressions: Update stats due to introduction of TSONilay Vaish
2012-01-28SE/FS: Make both SE and FS tests available all the time.Gabe Black
2012-01-28SE/FS: Make SE vs. FS mode a runtime parameter.Gabe Black
2012-01-28Merge with the main repo.Gabe Black
2012-01-16Merge yet again with the main repository.Gabe Black
2012-01-25stats: Update stats for final tick and memory bandwidth patchesAli Saidi
2012-01-17MEM: Make the bus bridge unidirectional and fixed address rangeAndreas Hansson
2012-01-17MEM: Add port proxies instead of non-structural portsAndreas Hansson
2012-01-17Ruby: Change the access permissions for MOESI hammerAndreas Hansson
2012-01-16stats: undo parser change from initparam changeAli Saidi
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