Age | Commit message (Collapse) | Author |
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This patch adds a simple regression that calls the existing
memcheck.py script.
--HG--
rename : tests/configs/learning-gem5-p1-simple.py => tests/configs/memcheck.py
rename : tests/quick/se/70.tgen/test.py => tests/quick/se/51.memcheck/test.py
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Removed unused stats, now counting WriteLineReq, and changed how
uncacheable writes are handled while responses are outstanding.
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Small changes to the branch predictor and BTB caused stats changes
throughout.
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Additional auxv entries leads to more instructions in start-up
while walking the list, along with different cache conflicts
wrt stack entries.
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SE O3 runs see an additional reg read per mmap() call.
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Update stats to match current behaviour. As a result of the earlier
conflict check we are seeing a few prefetch requests being ignored
before being sent as upward snoops.
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Output changed way back in this cset:
changeset: 11345:b6a66a90e0a1
user: John Kalamatianos <john.kalamatianos@amd.com>
summary: gpu: fix bugs with MemFence, Flat Instrs and Resource utilization
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Writes to locked memory addresses (LLSC) did not wake up the locking
CPU. This can lead to deadlocks on multi-core runs. In AtomicSimpleCPU,
recvAtomicSnoop was checking if the incoming packet was an invalidation
(isInvalidate) and only then handled a locked snoop. But, writes are
seen instead of invalidates when running without caches (fast-forward
configurations). As as simple fix, now handleLockedSnoop is also called
even if the incoming snoop packet are from writes.
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Bug fix for check on protobuf file frequency being different than
global frequency.
The ASCII encoder script is also fixed, and the example trace used in
the regressions is updated.
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Result of running 'hg m5style --skip-all --fix-control -a'.
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Result of running 'hg m5style --skip-all --fix-white -a'.
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The fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic test was
broken for so long that, now that it's working again, the stats
output is out of date. This changeset updates the outputs, on
the assumption that the stats changes are all valid differences
due to other changes made while it was broken.
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A couple of the long regressions have been showing as CHANGED
since 11244:a2af58a06c4e despite the updates in 11245:1c5102c0a7a9.
The x86 regression looks like it was just missed, but it's not clear
why the ARM one is giving different results (perhaps a non-determinism
between zizzer and wherever the updated results were run?).
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The 01.hello-2T-smt test case for the O3 CPU didn't correctly setup
the number of threads before creating interrupt controllers, which
confused the constructor in BaseCPU. This changeset adds SMT support
to the test configuration infrastructure.
--HG--
rename : tests/configs/o3-timing.py => tests/configs/o3-timing-mt.py
rename : tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/config.ini
rename : tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/simerr => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/simerr
rename : tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/simout => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/simout
rename : tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/stats.txt => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/stats.txt
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Adds per-thread interrupt controllers and thread/context logic
so that interrupts properly get routed in SMT systems.
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Adds SMT support to the "simple" CPU models so that they can be
used with other SMT-supported CPUs. Example usage: this enables
the TimingSimpleCPU to be used to warmup caches before swapping to
detailed mode with the in-order or out-of-order based CPU models.
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Due slight change to latency for the reissue table.
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Committed by: Nilay Vaish <nilay@cs.wisc.edu>
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These tests will ensure that Learning gem5 scripts are always up to date with
the changes in the mainline of gem5.
Committed by: Nilay Vaish <nilay@cs.wisc.edu>
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Changes due to recent patches: fc1e41e88fd3, 882ce080c9f7, e8a6637afa4c, and
e6e3b7097810 by Joel Hestness.
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Not sure what went wrong in the pushing of the Ruby patches, but
somehow these regressions are not updated.
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The name of the stack distance stats changed slightly when the stack
distance calculator was redesigned as a probe. Update the reference
stats to reflect this.
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This changeset moves the access trace functionality from the
CommMonitor into a separate probe. The probe can be hooked up to any
component that exports probe points of the type ProbePoints::Packet.
This patch moves the dependency on Google's Protocol Buffers library
from the CommMonitor to the MemTraceProbe, which means that the
CommMonitor (including stack distance profiling) no long depends on
it.
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