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Age
Commit message (
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Author
2012-09-13
Stats: Remove the reference stats that are no longer present
Andreas Hansson
2012-09-11
x86 Regressions: Update stats due to register predication
Nilay Vaish
2012-09-10
Regression: Updates due to changes to Ruby memory controller
Nilay Vaish
2012-09-10
Ruby: Bump the stats after recent memory controller changes
Andreas Hansson
2012-09-10
Device: Update stats for PIO and PCI latency change
Andreas Hansson
2012-09-05
stats: Update Ruby regressions for memory controller fix
Joel Hestness
2012-08-28
Checker: Bump the realview-o3-checker regression
Andreas Hansson
2012-08-25
Regression: updates ruby.stats due to change in virtual network
Nilay Vaish
2012-08-22
Bridge: Remove NACKs in the bridge and unify with packet queue
Andreas Hansson
2012-08-15
stats: Update stats for syscall emulation Linux kernel changes.
Ali Saidi
2012-07-30
stats: revert pc-simple-timing-ruby-MESI_CMP_directory to before last update
Ali Saidi
2012-07-28
stats: fix some miss-committed changes from the icache change
Ali Saidi
2012-07-27
stats: update stats for icache change not allowing dirty data
Ali Saidi
2012-07-23
test: Update eio ref outputs due to recent changes
Steve Reinhardt
2012-07-23
test: Restore eio ref files clobbered in rev 8800b05e1cb3.
Steve Reinhardt
2012-07-22
Regression: Update stats due to changes to x86 cpuid instruction
Nilay Vaish
2012-07-21
Regression: Fix topologies path in failing pc-simple-timing-ruby
Andreas Hansson
2012-07-12
Mem: Make SimpleMemory single ported
Andreas Hansson
2012-07-12
Regression: update ruby.stats file
Nilay Vaish
2012-07-10
regress: ruby stat additions and config changes
Brad Beckmann
2012-07-09
Stats: Updates due to bus changes
Andreas Hansson
2012-06-29
Stats: Update stats for RAS and LRU fixes.
Ali Saidi
2012-06-11
Regression: Fix some bugs in simple-timing-mp-ruby.py.
Marc Orr
2012-06-05
all: Update stats for memory per master and total fix.
Ali Saidi
2012-06-04
X86: Update stats for the CPUID change.
Gabe Black
2012-05-31
Bus: Split the bus into a non-coherent and coherent bus
Andreas Hansson
2012-05-09
Stats: Fix stats to match output after changeset 8800b05e1cb3
Andreas Hansson
2012-05-27
X86: Add a 32 bit hello world test binary.
Gabe Black
2012-05-22
X86 Regression: update stats due to cc register split
Nilay Vaish
2012-05-10
ARM: update stats for clock frequency fix.
Ali Saidi
2012-05-09
stats: update stats for no_value -> nan
Nathan Binkert
2012-05-03
Regression: Move x86 fs ruby simulation from quick to long
Nilay Vaish
2012-04-30
Regression: Stats update for X86 Ruby FS test
Nilay Vaish
2012-04-25
Regression: Add a test for x86 timing full system ruby simulation
Nilay Vaish
2012-04-24
X86: Update stats for the slightly changed TLB behavior.
Gabe Black
2012-04-14
Regression: Add ANSI colours to highlight test status
Andreas Hansson
2012-04-12
Stats: Update with use of std::map for ordered iteration in Ruby
Andreas Hansson
2012-04-06
regress: ruby random tester and hammer stats updates
Brad Beckmann
2012-04-06
MOESI_hammer: fixed bug with single cpu + flushes, then modified the regressi...
Brad Beckmann
2012-04-06
MEM: Enable multiple distributed generalized memories
Andreas Hansson
2012-03-28
Config: Change the way options are added
Nilay Vaish
2012-03-21
ARM: Update stats for IT and conditional branch changes
Ali Saidi
2012-03-09
ARM: Update stats for CBNZ fix.
Ali Saidi
2012-03-09
ARM: Update stats for valgrind fix and replace config.inis which are out of d...
Ali Saidi
2012-03-09
CheckerCPU: Make some basic regression tests for CheckerCPU
Geoffrey Blake
2012-03-09
cache: Allow main memory to be at disjoint address ranges.
Ali Saidi
2012-03-08
Fix the SPARC fs regression by adding a call to createInterruptController.
Gabe Black
2012-03-06
Stats: Update stats for changeset 8868
Andreas Hansson
2012-03-02
CPU: Check that the interrupt controller is created when needed
Andreas Hansson
2012-03-02
Stats: Fix the realview regression stats after nvmem move
Andreas Hansson
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