| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2015-09-18 | dev, arm: Add gem5 extensions to support more than 8 cores | Karthik Sangaiah | |
| Previous ARM-based simulations were limited to 8 cores due to limitations in GICv2 and earlier. This changeset adds a set of gem5-specific extensions that enable support for up to 256 cores. When the gem5 extensions are enabled, the GIC uses CPU IDs instead of a CPU bitmask in the GIC's register interface. To OS can enable the extensions by setting bit 0x200 in ICDICTR. This changeset is based on previous work by Matt Evans. | |||
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index : gem5 | |
| gem5 |
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