| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2017-04-03 | arm, dev: refactor GIC Pl390 GICD_ITARGETSRn handling | Curtis Dunham | |
| The aforementioned registers (Interrupt Processor Targets Registers) are banked per-CPU, but are read-only. This patch eliminates the per-CPU storage of these values that are simply computed. Change-Id: I52cafc2f58e87dd54239a71326c01f4923544689 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2442 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Weiping Liao <weipingliao@google.com> | |||
| 2016-08-02 | arm: bank GIC registers per CPU | Curtis Dunham | |
| Updated according to GICv2 documentation. Change-Id: I5d926d1abf665eecc43ff0f7d6e561e1ee1c390a Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> | |||
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