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2018-08-17tests: Add test for the m5-exit instruction.Sean Wilson
Change-Id: I92a589b267ce659b6fbcf710043436b84fcb1c63 Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/4423 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
2018-01-25util: Implement Lua module for m5ops.Hanhwi Jang
This module allows m5ops to be executed in Lua programs. To compile it (in util/m5): The following command generates Lua moduel, gem5OpLua.so. make -f Makefile.<arch> gem5OpLua.so To use it: First, put gem5OpLua.so in Lua library search path. Then, import the module and execute the m5op function. Example usage, creating a checkpoint. m5 = require("gem5OpLua") m5.do_checkpoint(0, 0) Change-Id: Icc18a1fb6c050afeb1cf4558fbdc724fb26a90e2 Reviewed-on: https://gem5-review.googlesource.com/6541 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-08-01util: Move the m5ops.h file to a shared directoryAndreas Sandberg
The header file m5ops.h contains a list of constants that should be shared between the simulator and utilities. Move this header file to a new top-level directory for shared files and rename constants to make them suitable for inclusion in the main simulator. The structure of the shared include directory is as follows: include/gem5: Files that can be included from C code. include/gem5/asm: Files that can be included from assembly code. asm/generic/: Files that aren't guest ISA specific asm/${isa}/: Files that are guest ISA specific Change-Id: I1aa511057bcaa80cc2d566109ff26581558c4a41 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jose Marinho <jose.marinho@arm.com> Reviewed-on: https://gem5-review.googlesource.com/4261 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2013-09-30x86: Add support for m5ops through a memory mapped interfaceAndreas Sandberg
In order to support m5ops in virtualized environments, we need to use a memory mapped interface. This changeset adds support for that by reserving 0xFFFF0000-0xFFFFFFFF and mapping those to the generic IPR interface for m5ops. The mapping is done in the X86ISA::TLB::finalizePhysical() which means that it just works for all of the CPU models, including virtualized ones.
2009-01-07X86: Set up support for adding m5 pseudo insts to a binary.Gabe Black