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2017-09-26misc: Make the m5 utilities writefile command accept a host path.Gabe Black
When the writefile command is given one command line argument, it's treated as the name of the file in the simulation and on the host. When there are two arguments, the first is the filename in the simulation, and the second is the name on the host. Change-Id: I402925a9ff89665bee9910fb18b7f8b06b8f7d35 Reviewed-on: https://gem5-review.googlesource.com/4850 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
2017-08-01util: Move m5op.h to the shared include directoryAndreas Sandberg
The header file with C declarations for m5ops is sometimes needed by code outside of the util/m5 directory. Move this file to the shared include directory and factor out flags to a generic asm header. Note that applications that need to call m5ops still need to link with libm5.a or implement their own trampolines. Change-Id: I36a3f459ed71593e38b869dc2b1302c810f92276 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jose Marinho <jose.marinho@arm.com> Reviewed-on: https://gem5-review.googlesource.com/4265 Reviewed-by: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-08-01util, m5: Use consistent naming for m5op C symbolsAndreas Sandberg
Rename m5op C symbols to be prefixed all lower case, separated by underscore, and prefixed by m5. This avoids potential name clashes for short names such as arm. Change-Id: Ic42f94d8a722661ef96c151d627e31eeb2e51490 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jose Marinho <jose.marinho@arm.com> Reviewed-on: https://gem5-review.googlesource.com/4264 Reviewed-by: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-05-15style: fix line lengths and include orderingBrandon Potter
The style checker complains about line length and ordering for these files. This fix should make these two files kosher. Change-Id: I822a0518a98d9e379a543d2017e90c4e9666a58d Reviewed-on: https://gem5-review.googlesource.com/3380 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com>
2017-05-09util: Correctly handle short writes in m5 (read|exec)fileAndreas Sandberg
The m5 tool has subcommands that writes a file to the simulated file system. The implementation of this command currently doesn't check the return value from write, which leads to compiler warnings and potentially incorrect behavior. Add the necessary checks. Change-Id: If558534d3245aa24cf15edf06bd0af4c6ba3908c Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2962 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Gabe Black <gabeblack@google.com>
2017-05-09util: Add the m5_loadsymbol pseudo op to the m5 toolAndreas Sandberg
Change-Id: Ib8bf4eac77170db8b2bf44796fd9d46b02217d03 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3122 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Gabe Black <gabeblack@google.com>
2017-05-09util: Fix incorrect use of m5_loadsymbolAndreas Sandberg
It seems like the m5 utility incorrectly called m5_loadsymbol instead of m5_addsymbol. Judging by the signature of the loadsymbol command, the expected behavior is to add a new symbol to gem5's symbol table. This is behavior is implemented by m5_addsymbol. Change-Id: I83b61c48d6f8d7b1e8b57d884dfca00481c83c3a Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2961 Reviewed-by: Gabe Black <gabeblack@google.com>
2017-05-08util: Fix incorrect return type in m5 writefileAndreas Sandberg
Change-Id: Ic24a1c3c1488e970ed27bb6b99262d201f535384 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2960 Reviewed-by: Gabe Black <gabeblack@google.com>
2016-03-16misc: Fix argument handling for m5 initparam utilGabor Dozsa
2016-02-06style: remove trailing whitespaceSteve Reinhardt
Result of running 'hg m5style --skip-all --fix-white -a'.
2016-01-07pseudo inst,util: Add optional key to initparam pseudo instructionGabor Dozsa
The key parameter can be used to read out various config parameters from within the simulated software.
2013-10-31arm: fix m5ops binary for ARM and add m5fail.Ali Saidi
Changes to make m5ops work under virtualization seemed to break them working with non-virtualized systems and the recently added m5 fail command makes the m5op binary not compile. For now remove the code for virtualization.
2013-09-30x86: Add support for m5ops through a memory mapped interfaceAndreas Sandberg
In order to support m5ops in virtualized environments, we need to use a memory mapped interface. This changeset adds support for that by reserving 0xFFFF0000-0xFFFFFFFF and mapping those to the generic IPR interface for m5ops. The mapping is done in the X86ISA::TLB::finalizePhysical() which means that it just works for all of the CPU models, including virtualized ones.
2013-01-08util: add m5_fail op.Lluís Vilanova
Used as a command in full-system scripts helps the user ensure the benchmarks have finished successfully. For example, one can use: /path/to/benchmark args || /sbin/m5 fail 1 and thus ensure gem5 will exit with an error if the benchmark fails.
2013-01-07util: Fix stack corruption in the m5 utilAndreas Sandberg
The number of arguments specified when calling parse_int_args() in do_exit() is incorrect. This leads to stack corruption since it causes writes past the end of the ints array.
2012-09-07ARM: fix m5 op binary to properly convert 64bit operandsAli Saidi
2012-01-31util: implements "writefile" gem5 op to export file from guest to host ↵Dam Sunwoo
filesystem Usage: m5 writefile <filename> File will be created in the gem5 output folder with the identical filename. Implementation is largely based on the existing "readfile" functionality. Currently does not support exporting of folders.
2012-01-09ARM: Add support for initparam m5 opAli Saidi
2011-04-15includes: sort all includesNathan Binkert
2010-08-12util/m5/m5.c: ensure readfile() buffer pages are in page tableJoel Hestness
(and marked dirty, in case that matters) by touching them beforehand
2008-12-03util/m5: Add a new function called pin to bind a program to a set of cores.Nathan Binkert
This is not m5 specific and this currently only works in linux.
2008-12-03util/m5: reorganize code so it is easier to add operationsNathan Binkert
2007-02-24make m5 readfile work on solaris... we can have a solaris regression soon!Ali Saidi
src/arch/sparc/isa/decoder.isa: add readfile and break to sparc decoder src/arch/sparc/isa/operands.isa: fix O0-O5 operands registers util/m5/Makefile.sparc: Make sparc makefile compile a 64bit binary util/m5/m5.c: readfile was in here twice, once will be sufficient I think util/m5/m5op_sparc.S: implement readfile and debugbreak --HG-- extra : convert_revision : 139b3f480ee6342b37b5642e072c8486d91a3944
2007-02-21add pseduo instruction support for sparcAli Saidi
util/m5/Makefile.alpha: Clean up to make it a bit easier to muck with util/m5/Makefile.alpha: Make the makefile more reasonable util/m5/Makefile.alpha: Remove authors from copyright. util/m5/Makefile.alpha: Updated Authors from bk prs info util/m5/Makefile.alpha: bk cp Makefile Makefile.alpha src/arch/sparc/tlb.cc: Clean up the cache code a little bit and make sure the uncacbale bit is set when appropriate src/arch/alpha/isa/decoder.isa: src/sim/pseudo_inst.cc: src/sim/pseudo_inst.hh: Rename AlphaPseudo -> PseudoInst since it's all generic src/arch/sparc/isa/bitfields.isa: src/arch/sparc/isa/decoder.isa: src/arch/sparc/isa/includes.isa: src/arch/sparc/isa/operands.isa: Add support for pseudo instructions in sparc util/m5/Makefile.alpha: util/m5/Makefile.sparc: split off alpha make file and sparc make file for m5 app util/m5/m5.c: ivle and ivlb aren't used anymore util/m5/m5op.h: stdint seems like a more generic better fit here util/m5/m5op_alpha.S: move the op ids into their own header file since we can share them between sparc and alpha --HG-- rename : util/m5/Makefile => util/m5/Makefile.sparc rename : util/m5/m5op.S => util/m5/m5op_alpha.S extra : convert_revision : 490ba2e8b8bc6e28bfc009cedec6b686b28e7834
2006-11-06Cleaned up remnants of ivlb and ivleGabe Black
--HG-- extra : convert_revision : 93b37dbcd3d9dd1eced0f829223f52b53fe58643
2006-09-30Merge ktlim@zamp:./local/clean/o3-merge/m5Kevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/o3-merge/newmem configs/boot/micro_memlat.rcS: configs/boot/micro_tlblat.rcS: src/arch/alpha/ev5.cc: src/arch/alpha/isa/decoder.isa: src/arch/alpha/isa_traits.hh: src/cpu/base.cc: src/cpu/base.hh: src/cpu/base_dyn_inst.hh: src/cpu/checker/cpu.hh: src/cpu/checker/cpu_impl.hh: src/cpu/o3/alpha/cpu_impl.hh: src/cpu/o3/alpha/params.hh: src/cpu/o3/checker_builder.cc: src/cpu/o3/commit_impl.hh: src/cpu/o3/cpu.cc: src/cpu/o3/decode_impl.hh: src/cpu/o3/fetch_impl.hh: src/cpu/o3/iew.hh: src/cpu/o3/iew_impl.hh: src/cpu/o3/inst_queue.hh: src/cpu/o3/lsq.hh: src/cpu/o3/lsq_impl.hh: src/cpu/o3/lsq_unit.hh: src/cpu/o3/lsq_unit_impl.hh: src/cpu/o3/regfile.hh: src/cpu/o3/rename_impl.hh: src/cpu/o3/thread_state.hh: src/cpu/ozone/checker_builder.cc: src/cpu/ozone/cpu.hh: src/cpu/ozone/cpu_impl.hh: src/cpu/ozone/front_end.hh: src/cpu/ozone/front_end_impl.hh: src/cpu/ozone/lw_back_end.hh: src/cpu/ozone/lw_back_end_impl.hh: src/cpu/ozone/lw_lsq.hh: src/cpu/ozone/lw_lsq_impl.hh: src/cpu/ozone/thread_state.hh: src/cpu/simple/base.cc: src/cpu/simple_thread.cc: src/cpu/simple_thread.hh: src/cpu/thread_state.hh: src/dev/ide_disk.cc: src/python/m5/objects/O3CPU.py: src/python/m5/objects/Root.py: src/python/m5/objects/System.py: src/sim/pseudo_inst.cc: src/sim/pseudo_inst.hh: src/sim/system.hh: util/m5/m5.c: Hand merge. --HG-- rename : arch/alpha/ev5.cc => src/arch/alpha/ev5.cc rename : arch/alpha/freebsd/system.cc => src/arch/alpha/freebsd/system.cc rename : arch/alpha/isa/decoder.isa => src/arch/alpha/isa/decoder.isa rename : arch/alpha/isa/mem.isa => src/arch/alpha/isa/mem.isa rename : arch/alpha/isa_traits.hh => src/arch/alpha/isa_traits.hh rename : arch/alpha/linux/system.cc => src/arch/alpha/linux/system.cc rename : arch/alpha/system.cc => src/arch/alpha/system.cc rename : arch/alpha/tru64/system.cc => src/arch/alpha/tru64/system.cc rename : cpu/base.cc => src/cpu/base.cc rename : cpu/base.hh => src/cpu/base.hh rename : cpu/base_dyn_inst.hh => src/cpu/base_dyn_inst.hh rename : cpu/checker/cpu.hh => src/cpu/checker/cpu.hh rename : cpu/checker/cpu.cc => src/cpu/checker/cpu_impl.hh rename : cpu/o3/alpha_cpu_builder.cc => src/cpu/o3/alpha/cpu_builder.cc rename : cpu/checker/o3_cpu_builder.cc => src/cpu/o3/checker_builder.cc rename : cpu/o3/commit_impl.hh => src/cpu/o3/commit_impl.hh rename : cpu/o3/cpu.cc => src/cpu/o3/cpu.cc rename : cpu/o3/fetch_impl.hh => src/cpu/o3/fetch_impl.hh rename : cpu/o3/iew.hh => src/cpu/o3/iew.hh rename : cpu/o3/iew_impl.hh => src/cpu/o3/iew_impl.hh rename : cpu/o3/inst_queue.hh => src/cpu/o3/inst_queue.hh rename : cpu/o3/inst_queue_impl.hh => src/cpu/o3/inst_queue_impl.hh rename : cpu/o3/lsq_impl.hh => src/cpu/o3/lsq_impl.hh rename : cpu/o3/lsq_unit.hh => src/cpu/o3/lsq_unit.hh rename : cpu/o3/lsq_unit_impl.hh => src/cpu/o3/lsq_unit_impl.hh rename : cpu/o3/mem_dep_unit_impl.hh => src/cpu/o3/mem_dep_unit_impl.hh rename : cpu/o3/rename.hh => src/cpu/o3/rename.hh rename : cpu/o3/rename_impl.hh => src/cpu/o3/rename_impl.hh rename : cpu/o3/thread_state.hh => src/cpu/o3/thread_state.hh rename : cpu/o3/tournament_pred.cc => src/cpu/o3/tournament_pred.cc rename : cpu/o3/tournament_pred.hh => src/cpu/o3/tournament_pred.hh rename : cpu/checker/cpu_builder.cc => src/cpu/ozone/checker_builder.cc rename : cpu/ozone/cpu.hh => src/cpu/ozone/cpu.hh rename : cpu/ozone/cpu_builder.cc => src/cpu/ozone/cpu_builder.cc rename : cpu/ozone/cpu_impl.hh => src/cpu/ozone/cpu_impl.hh rename : cpu/ozone/front_end.hh => src/cpu/ozone/front_end.hh rename : cpu/ozone/front_end_impl.hh => src/cpu/ozone/front_end_impl.hh rename : cpu/ozone/inorder_back_end_impl.hh => src/cpu/ozone/inorder_back_end_impl.hh rename : cpu/ozone/inst_queue_impl.hh => src/cpu/ozone/inst_queue_impl.hh rename : cpu/ozone/lw_back_end.hh => src/cpu/ozone/lw_back_end.hh rename : cpu/ozone/lw_back_end_impl.hh => src/cpu/ozone/lw_back_end_impl.hh rename : cpu/ozone/lw_lsq.hh => src/cpu/ozone/lw_lsq.hh rename : cpu/ozone/lw_lsq_impl.hh => src/cpu/ozone/lw_lsq_impl.hh rename : cpu/ozone/simple_params.hh => src/cpu/ozone/simple_params.hh rename : cpu/ozone/thread_state.hh => src/cpu/ozone/thread_state.hh rename : cpu/simple/cpu.cc => src/cpu/simple/base.cc rename : cpu/cpu_exec_context.cc => src/cpu/simple_thread.cc rename : cpu/thread_state.hh => src/cpu/thread_state.hh rename : dev/ide_disk.hh => src/dev/ide_disk.hh rename : python/m5/objects/BaseCPU.py => src/python/m5/objects/BaseCPU.py rename : python/m5/objects/AlphaFullCPU.py => src/python/m5/objects/O3CPU.py rename : python/m5/objects/OzoneCPU.py => src/python/m5/objects/OzoneCPU.py rename : python/m5/objects/Root.py => src/python/m5/objects/Root.py rename : python/m5/objects/System.py => src/python/m5/objects/System.py rename : sim/eventq.hh => src/sim/eventq.hh rename : sim/pseudo_inst.cc => src/sim/pseudo_inst.cc rename : sim/pseudo_inst.hh => src/sim/pseudo_inst.hh rename : sim/serialize.cc => src/sim/serialize.cc rename : sim/stat_control.cc => src/sim/stat_control.cc rename : sim/stat_control.hh => src/sim/stat_control.hh rename : sim/system.hh => src/sim/system.hh extra : convert_revision : 135d90e43f6cea89f9460ba4e23f4b0b85886e7d
2006-08-23Support loading in a symbol file.Kevin Lim
arch/alpha/freebsd/system.cc: arch/alpha/isa/decoder.isa: arch/alpha/linux/system.cc: arch/alpha/system.cc: arch/alpha/tru64/system.cc: Let symbol files be read in so that profiling can happen on the binaries as well. python/m5/objects/System.py: Add in symbol files. sim/pseudo_inst.cc: Load in a specified symbol file. sim/pseudo_inst.hh: Allow for symbols to be loaded. sim/system.hh: Support symbol file. util/m5/m5.c: util/m5/m5op.S: Add support to m5 util for loading symbols (and readfile). --HG-- extra : convert_revision : f10c1049bcd7b22b98c73052c0666b964aff222b
2006-08-17Add readfile back in.Kevin Lim
--HG-- extra : convert_revision : 0b64f2d95b439b19f1131fe00f45da56617b0026
2006-05-31Updated Authors from bk prs infoAli Saidi
--HG-- extra : convert_revision : 77f475b156d81c03a2811818fa23593d5615c685
2006-02-28Add quiesceNs, quiesceTime, quiesceCycles, and m5panic pseudo ops.Ali Saidi
This changeset removes a check that prevents quiescing when an interrupt is pending. *** You should only call quiesce if that isn't a problem. *** arch/alpha/isa/decoder.isa: sim/pseudo_inst.cc: sim/pseudo_inst.hh: Add quiesceNs, quiesceCycles, quisceTime and m5panic pseudo ops. These quiesce for a number of ns, cycles, report how long we were quiesced for, and panic the simulator respectively. The latter is added to the panic() function in the console and linux kernel instead of executing an infinite loop until someone notices. cpu/exec_context.cc: cpu/exec_context.hh: Add a quiesce end event to the execution contexted which upon executing wakes up a CPU for quiesceCycles/quiesceNs. util/m5/Makefile: Make the makefile more reasonable util/m5/m5.c: update the m5op executable to use the files from the linux tree util/m5/m5op.S: update m5op.S from linux tree util/m5/m5op.h: update m5op.h from linux tree --HG-- rename : util/m5/m5op.s => util/m5/m5op.S extra : convert_revision : 3be18525e811405b112e33f24a8c4e772d15462d
2005-06-05Many files:Steve Reinhardt
Update copyright dates and author list SConscript: arch/alpha/alpha_linux_process.cc: arch/alpha/alpha_linux_process.hh: arch/alpha/alpha_memory.cc: arch/alpha/alpha_memory.hh: arch/alpha/alpha_tru64_process.cc: arch/alpha/alpha_tru64_process.hh: arch/alpha/aout_machdep.h: arch/alpha/arguments.cc: arch/alpha/arguments.hh: arch/alpha/ev5.cc: arch/alpha/ev5.hh: arch/alpha/faults.cc: arch/alpha/faults.hh: arch/alpha/isa_desc: arch/alpha/isa_traits.hh: arch/alpha/osfpal.cc: arch/alpha/osfpal.hh: arch/alpha/pseudo_inst.cc: arch/alpha/pseudo_inst.hh: arch/alpha/vptr.hh: arch/alpha/vtophys.cc: arch/alpha/vtophys.hh: base/bitfield.hh: base/callback.hh: base/circlebuf.cc: base/circlebuf.hh: base/cprintf.cc: base/cprintf.hh: base/cprintf_formats.hh: base/crc.hh: base/date.cc: base/dbl_list.hh: base/endian.hh: base/fast_alloc.cc: base/fast_alloc.hh: base/fifo_buffer.cc: base/fifo_buffer.hh: base/hashmap.hh: base/hostinfo.cc: base/hostinfo.hh: base/hybrid_pred.cc: base/hybrid_pred.hh: base/inet.cc: base/inet.hh: base/inifile.cc: base/inifile.hh: base/intmath.cc: base/intmath.hh: base/match.cc: base/match.hh: base/misc.cc: base/misc.hh: base/mod_num.hh: base/mysql.cc: base/mysql.hh: base/output.cc: base/output.hh: base/pollevent.cc: base/pollevent.hh: base/predictor.hh: base/random.cc: base/random.hh: base/range.cc: base/range.hh: base/refcnt.hh: base/remote_gdb.cc: base/remote_gdb.hh: base/res_list.hh: base/sat_counter.cc: base/sat_counter.hh: base/sched_list.hh: base/socket.cc: base/socket.hh: base/statistics.cc: base/statistics.hh: base/compression/lzss_compression.cc: base/compression/lzss_compression.hh: base/compression/null_compression.hh: base/loader/aout_object.cc: base/loader/aout_object.hh: base/loader/ecoff_object.cc: base/loader/ecoff_object.hh: base/loader/elf_object.cc: base/loader/elf_object.hh: base/loader/object_file.cc: base/loader/object_file.hh: base/loader/symtab.cc: base/loader/symtab.hh: base/stats/events.cc: base/stats/events.hh: base/stats/flags.hh: base/stats/mysql.cc: base/stats/mysql.hh: base/stats/mysql_run.hh: base/stats/output.hh: base/stats/statdb.cc: base/stats/statdb.hh: base/stats/text.cc: base/stats/text.hh: base/stats/types.hh: base/stats/visit.cc: base/stats/visit.hh: base/str.cc: base/str.hh: base/time.cc: base/time.hh: base/timebuf.hh: base/trace.cc: base/trace.hh: base/userinfo.cc: base/userinfo.hh: build/SConstruct: cpu/base.cc: cpu/base.hh: cpu/base_dyn_inst.cc: cpu/base_dyn_inst.hh: cpu/exec_context.cc: cpu/exec_context.hh: cpu/exetrace.cc: cpu/exetrace.hh: cpu/inst_seq.hh: cpu/intr_control.cc: cpu/intr_control.hh: cpu/memtest/memtest.cc: cpu/pc_event.cc: cpu/pc_event.hh: cpu/smt.hh: cpu/static_inst.cc: cpu/static_inst.hh: cpu/memtest/memtest.hh: cpu/o3/sat_counter.cc: cpu/o3/sat_counter.hh: cpu/ozone/cpu.hh: cpu/simple/cpu.cc: cpu/simple/cpu.hh: cpu/trace/opt_cpu.cc: cpu/trace/opt_cpu.hh: cpu/trace/reader/ibm_reader.cc: cpu/trace/reader/ibm_reader.hh: cpu/trace/reader/itx_reader.cc: cpu/trace/reader/itx_reader.hh: cpu/trace/reader/m5_reader.cc: cpu/trace/reader/m5_reader.hh: cpu/trace/reader/mem_trace_reader.cc: cpu/trace/reader/mem_trace_reader.hh: cpu/trace/trace_cpu.cc: cpu/trace/trace_cpu.hh: dev/alpha_access.h: dev/alpha_console.cc: dev/alpha_console.hh: dev/baddev.cc: dev/baddev.hh: dev/disk_image.cc: dev/disk_image.hh: dev/etherbus.cc: dev/etherbus.hh: dev/etherdump.cc: dev/etherdump.hh: dev/etherint.cc: dev/etherint.hh: dev/etherlink.cc: dev/etherlink.hh: dev/etherpkt.cc: dev/etherpkt.hh: dev/ethertap.cc: dev/ethertap.hh: dev/ide_ctrl.cc: dev/ide_ctrl.hh: dev/ide_disk.cc: dev/ide_disk.hh: dev/io_device.cc: dev/io_device.hh: dev/ns_gige.cc: dev/ns_gige.hh: dev/ns_gige_reg.h: dev/pciconfigall.cc: dev/pciconfigall.hh: dev/pcidev.cc: dev/pcidev.hh: dev/pcireg.h: dev/pktfifo.cc: dev/pktfifo.hh: dev/platform.cc: dev/platform.hh: dev/simconsole.cc: dev/simconsole.hh: dev/simple_disk.cc: dev/simple_disk.hh: dev/sinic.cc: dev/sinic.hh: dev/sinicreg.hh: dev/tsunami.cc: dev/tsunami.hh: dev/tsunami_cchip.cc: dev/tsunami_cchip.hh: dev/tsunami_io.cc: dev/tsunami_io.hh: dev/tsunami_pchip.cc: dev/tsunami_pchip.hh: dev/tsunamireg.h: dev/uart.cc: dev/uart.hh: dev/uart8250.cc: dev/uart8250.hh: docs/stl.hh: encumbered/cpu/full/op_class.hh: kern/kernel_stats.cc: kern/kernel_stats.hh: kern/linux/linux.hh: kern/linux/linux_syscalls.cc: kern/linux/linux_syscalls.hh: kern/linux/linux_system.cc: kern/linux/linux_system.hh: kern/linux/linux_threadinfo.hh: kern/linux/printk.cc: kern/linux/printk.hh: kern/system_events.cc: kern/system_events.hh: kern/tru64/dump_mbuf.cc: kern/tru64/dump_mbuf.hh: kern/tru64/mbuf.hh: kern/tru64/printf.cc: kern/tru64/printf.hh: kern/tru64/tru64.hh: kern/tru64/tru64_events.cc: kern/tru64/tru64_events.hh: kern/tru64/tru64_syscalls.cc: kern/tru64/tru64_syscalls.hh: kern/tru64/tru64_system.cc: kern/tru64/tru64_system.hh: python/SConscript: python/m5/__init__.py: python/m5/config.py: python/m5/convert.py: python/m5/multidict.py: python/m5/smartdict.py: sim/async.hh: sim/builder.cc: sim/builder.hh: sim/debug.cc: sim/debug.hh: sim/eventq.cc: sim/eventq.hh: sim/host.hh: sim/main.cc: sim/param.cc: sim/param.hh: sim/process.cc: sim/process.hh: sim/root.cc: sim/serialize.cc: sim/serialize.hh: sim/sim_events.cc: sim/sim_events.hh: sim/sim_exit.hh: sim/sim_object.cc: sim/sim_object.hh: sim/startup.cc: sim/startup.hh: sim/stat_control.cc: sim/stat_control.hh: sim/stats.hh: sim/syscall_emul.cc: sim/syscall_emul.hh: sim/system.cc: sim/system.hh: test/bitvectest.cc: test/circletest.cc: test/cprintftest.cc: test/genini.py: test/initest.cc: test/lru_test.cc: test/nmtest.cc: test/offtest.cc: test/paramtest.cc: test/rangetest.cc: test/sized_test.cc: test/stattest.cc: test/strnumtest.cc: test/symtest.cc: test/tokentest.cc: test/tracetest.cc: util/ccdrv/devtime.c: util/m5/m5.c: util/oprofile-top.py: util/rundiff: util/m5/m5op.h: util/m5/m5op.s: util/stats/db.py: util/stats/dbinit.py: util/stats/display.py: util/stats/info.py: util/stats/print.py: util/stats/stats.py: util/tap/tap.cc: Update copyright dates and author list --HG-- extra : convert_revision : 0faba08fc0fc0146f1efb7f61e4b043c020ff9e4
2003-11-02add several new functions that can be called from the guestNathan Binkert
to tell the simulator to do something. exit -> exit_old (deprecated exit now takes an optional parameter that tells it to execute at a specified time in the future The next four functions have two optional parameters. The first specifies a delay for how long to wait to issue the instruction. The second will tell the simulator to repeat that command at the specified interval. checkpoint will trigger a checkpoint dumpstats will cause the simulator to dump stats resetstats will cause all stats to be reset dumpreset will dump and reset stats all times are in nanoseconds util/m5/Makefile: Clean up to make it a bit easier to muck with util/m5/m5.c: Add a bunch of new commands and clean up the command parsing path Convert atoi to strtoul so that we can use 64bit numbers and even hex if we want to. (this runs on alpha, so a long is 64bit) util/m5/m5op.h: add prototypes for new m5 instructions use uint64_t since it's nicer --HG-- extra : convert_revision : 664ff00f0f0dfc5263c4e873d82fd9996a4521e9
2003-11-01LicensesNathan Binkert
--HG-- extra : convert_revision : ce47fdfaa5c59480a1fb38d86eed7d16ab7b5fc1
2003-11-01Commit a command for use inside a simulated system for communicatingNathan Binkert
with the simulator. This program is generally compiled as the name m5 and installed in /usr/local/bin This command uses opcodes that are invalid on a normal system, so don't expect it to do anything on a real system. --HG-- extra : convert_revision : fcbae99d4b0d38ff4a9950f1ab53923baa1f667a