Age | Commit message (Collapse) | Author |
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after system calls.
Because of peculiarities in how system calls are returned from, single stepping executes some system calls and the instruction following them in a single step. Statetrace now patches the executable image when it detects a system call to force "correct" behavior, aka the appearance of stepping one instruction every single time.
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modified_lines.
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The address of the stackpointer proceeding the vector minus 8 should be minus 16.
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of my machine at UM.
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creation and initialization now happens in python. Parameter objects
are generated and initialized by python. The .ini file is now solely for
debugging purposes and is not used in construction of the objects in any
way.
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Nag the user during compile if they have an hg cloned copy of M5, have
mercurial installed, but don't have the style hook enabled.
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it with FreeBSD's implementation
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that we get the result that we want
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have to since it doesn't work well on non-linux
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since things have moved around a bit
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and it's configuration is a hack
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into mercurial.
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into udhcp-macvpn-108.public.engin.umich.edu:/Users/ali/work/m5.newmem
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have any quick SPARC_FS tests at the moment
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into zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace
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it's single stepping code.
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src/dev/sparc/iob.cc:
don't warn on cpu restart/idle/halt stuff
tests/SConscript:
add sparc target in test Sconscript
util/regress:
Add SPARC_FS target in regress
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src/arch/sparc/isa/decoder.isa:
add readfile and break to sparc decoder
src/arch/sparc/isa/operands.isa:
fix O0-O5 operands registers
util/m5/Makefile.sparc:
Make sparc makefile compile a 64bit binary
util/m5/m5.c:
readfile was in here twice, once will be sufficient I think
util/m5/m5op_sparc.S:
implement readfile and debugbreak
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util/m5/Makefile.alpha:
Clean up to make it a bit easier to muck with
util/m5/Makefile.alpha:
Make the makefile more reasonable
util/m5/Makefile.alpha:
Remove authors from copyright.
util/m5/Makefile.alpha:
Updated Authors from bk prs info
util/m5/Makefile.alpha:
bk cp Makefile Makefile.alpha
src/arch/sparc/tlb.cc:
Clean up the cache code a little bit and make sure the uncacbale bit is set when appropriate
src/arch/alpha/isa/decoder.isa:
src/sim/pseudo_inst.cc:
src/sim/pseudo_inst.hh:
Rename AlphaPseudo -> PseudoInst since it's all generic
src/arch/sparc/isa/bitfields.isa:
src/arch/sparc/isa/decoder.isa:
src/arch/sparc/isa/includes.isa:
src/arch/sparc/isa/operands.isa:
Add support for pseudo instructions in sparc
util/m5/Makefile.alpha:
util/m5/Makefile.sparc:
split off alpha make file and sparc make file for m5 app
util/m5/m5.c:
ivle and ivlb aren't used anymore
util/m5/m5op.h:
stdint seems like a more generic better fit here
util/m5/m5op_alpha.S:
move the op ids into their own header file since we can share them between sparc and alpha
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rename : util/m5/Makefile => util/m5/Makefile.sparc
rename : util/m5/m5op.S => util/m5/m5op_alpha.S
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directory where tracediff is.
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m5 style and fixing whitespace. For whitespace, any tabs in
leading whitespace on a line are converted to spaces, and any
trailing whitespace is removed.
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(instead of complaining and exiting).
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into zizzer.eecs.umich.edu:/z/stever/bk/newmem-cache3
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into vm1.(none):/home/stever/bk/newmem-head
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util/make_release.py:
src/oldmem gone from repo, no need to delete here.
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into vm1.(none):/home/stever/bk/newmem-head
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