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2017-02-14sim: allow forward dependencies in checkpoint upgradersCurtis Dunham
The notion of forward dependencies is just expressing the same dependency but at the other end of the dependency edge, i.e. at the dependee rather than the depender. As there is no more 'power' here, it's strictly a convenience feature for handling dependencies with tags that are not in the upstream repository. Change-Id: Ic7c68de6aff4094aaa12de62cdf690a5dc65ccb5 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2017-02-14sim: add support for checkpoint downgradingCurtis Dunham
This commit supports the use case of transitioning tags and their associated checkpoint rewrites out of use for whatever reason. Just replace the upgrader() method with a downgrader() method that performs the appropriate inverse operation. The tag name is still used, but only in this negative, 'zombie' state, as it will be removed from the tags in the checkpoint and gem5 binary. Change-Id: If9d26cccfe8449e026762b1a72f0c2ae5a9cf2d7 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2017-02-13misc: Clean up and complete the gem5<->SystemC-TLM bridge [6/10]Christian Menard
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Update the README
2017-02-10misc: Update #!env calls for python to explicit versionJason Lowe-Power
In some newer Linux distributions, env python default to Python 3.0. This patch explicitly uses "python2" instead of just "python" for all scripts that use #! Reported-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [10/10]Christian Menard
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Add callbacks for the Gem5SimControl that are called at before and * after simulate() Reviewed at http://reviews.gem5.org/r/3799/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [9/10]Christian Menard
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Pay for the header delay that the gem5 XBar annotates to packets. Reviewed at http://reviews.gem5.org/r/3798/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [8/10]Christian Menard
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * bugfix: The BEGIN_RESP also needs to be handled when END_REQ was * skipped and '&trans == blockingRequest && phase == tlm::BEGIN_RESP' evaluates to true. Reviewed at http://reviews.gem5.org/r/3797/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [7/10]Christian Menard
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Implement 'pipe through' for gem5 Packets (see explanation below) Basically, this patch ensures that all transactions that originated in the gem5 world are converted back to the original packet when entering the gem5 world. So far, this only worked for packets that are responded to by a SyctemC component (e.g. when a gem5 CPU sends a request to a SystemC memory). By implementing the 'pipe through' this patch ensures, that packets that are responded to by a gem5 component (e.g. when a gem5 CPU sends a request to a gem5 memory via a SystemC interconnect) are handled properly. Reviewed at http://reviews.gem5.org/r/3796/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/10]Christian Menard
Changeset 11798:3a490c57058d --------------------------- misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/10] The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Introduce transactor modules that represent the gem5 ports in the * SystemC world. * Update the SimControl module and let it keep track of the gem5 ports. Reviewed at http://reviews.gem5.org/r/3775/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [4/10]Christian Menard
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Move common code of the example to a common directory. Move the cli * parsing from the SimControl module to a separate example object. Add * comments describing the Gem5SimControl module. Testing Done: Examples compile and run. Reviewed at http://reviews.gem5.org/r/3695/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [3/10]Christian Menard
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Simplify the Slave Port by using a simple_initiator_socket. Testing Done: Example applications are still running. Reviewed at http://reviews.gem5.org/r/3686/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [2/10]Christian Menard
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Add the Master Port. Add an example application that isslustrates its * use. Testing Done: A simple example application consisting of a TLM traffic generator and a gem5 memory is part of the patch. Reviewed at http://reviews.gem5.org/r/3528/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [1/10]Christian Menard
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Restructure the existing sources in preparation of the addition of the * new Master Port. * Refractor names to allow for distinction of the slave and master port. * Replace the Makefile by a SConstruct. Testing Done: The examples provided in util/tlm (now util/tlm/examples/slave_port) still compile and run error free. Reviewed at http://reviews.gem5.org/r/3527/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: fix includes in util/systemcChristian Menard
This fixes compilation errors with clang on OS X. Reviewed at http://reviews.gem5.org/r/3807/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Implement the Base SystemC Module as an sc_channel.Christian Menard
Implementing the Module as an sc_channel allows derived classes to provide SystemC interfaces. Other SystemC modules can connect to these interfaces. This meachanism can be used to control gem5 and acces gem5 components from within arbitrary SystemC moduels. Since sc_channel is derived from sc_module, this patch does not break compatibility with existing code. Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-07style: Force Python.h to be included before main headerAndreas Sandberg
Python's header files set various compiler macros (e.g., _XOPEN_SOURCE) unconditionally. This triggers preprocessor warnings that end up being treated as errors. The Python integration manual [1] strongly recommends that Python.h is included before any system header. The style guide used to mandate that Python.h is included first in any file that needs it. This requirement was changed to always include a source file's main header first, which ended up triggering these errors. This change updates the style checker to always include Python.h before the main header file. [1] https://docs.python.org/2/extending/extending.html Change-Id: Id6a4f7fc64a336a8fd26691a0ca682abeb1d1579 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Pierre-Yves Péneau <pierre-yves.peneau@lirmm.fr>
2017-01-27misc: Add support for switching multiple cores in SystemCPaul Rosenfeld
This patch adds a '-n' flag to the gem5 SystemC driver which allows multiple CPUs to be switched out to a new CPU. Primarily this involves appending CPU numbers to the objects searched for in the config manager if there are multiple CPUs in the system. Note that an equivalent change should be made to the util/cxx_config driver, but I wanted to get input on this first before making the same change over there Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-01-09misc: fixes deprecated sc_time function for SystemC 2.3.1Matthias Jung
The non-standard sc_time constructors - sc_time( uint64, bool scale ) - sc_time( double, bool scale ) have been deprecated in SystemC 2.3.1 and a warning is issued when being used. Insted the new 'sc_time::from_value' function is used to omit the warning message. Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-01-09misc: Documentation UpdateMatthias Jung
Updates for READMEs of /util/cxx_config, /util/systemc, /util/tlm. Some minor corrections, mostly with respect to MAC/OSX Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-01-03util: Add maintainer tools to create upstream patchesAndreas Sandberg
This changeset adds a maintainer script, create_patches.sh, that can be used to prepare for upstream from a git repository. The script can be used to generate patches in Mercurial or git format. The commit messages in the exported patches are all filtered, see upstream_msg_filter.sed, to ensure that irrelevant meta data isn't included in the upstream commit. Kudos to Curtis Dunham and Nikos Nikoleris for reviews and usability enhancements for earlier versions of this patch. Change-Id: Ia4cd089a32834b5e046ef58c0a173ca285b77bca Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2016-12-19dist, dev: fix etherswitch upgrade scriptCurtis Dunham
The aforementioned upgrader in [1] assumes every option in [system] has a delimiting '.', and also seems to do its rewriting work a bit too unconditionally. Most checkpoints in the wild don't have this device, in which case this script should be a safe no-op. [1] 2aa4d7b dist, dev: Fixed the packet ordering in etherswitch Change-Id: Icfd0350985109df1628eb9ab864cda42c54060a8 Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com>
2016-12-19arm: update AArch{64,32} register mappingsCurtis Dunham
Change-Id: Idaaaeb3f7b1a0bdbf18d8e2d46686c78bb411317 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-11-30riscv: [Patch 8/5] Added some regression tests to RISC-VAlec Roelke
This patch is the eighth patch in a series adding RISC-V to gem5, and third of the bonus patches to the original series of five. It adds some regression tests to RISC-V. Regression tests included: - se/00.hello - se/02.insttest (split into several binaries which are not included due to large size) The tests added to 00.insttest will need to be build manually; to facilitate this, a Makefile is included. The required toolchain and compiler (riscv64-unknown-elf-gcc) can be built from the riscv-tools GitHub repository at https://github.com/riscv/riscv-tools. Note that because EBREAK only makes sense when gdb is running or while in FS mode, it is not included in the linux-rv64i insttest. ERET is not included because it does not make sense in SE mode and, in fact, causes a panic by design. Note also that not every system call is tested in linux-rv64i; of the ones defined in linux/process.hh, some have been given numbers but not definitions for the toolchain, or are merely stubs that always return 0. Of the ones that do work properly, only a subset are tested due to similar functionality. Signed-off by: Alec Roelke Signed-off by: Jason Lowe-Power <jason@lowepower.com>
2016-11-25style: Add options to select checkers and apply fixesAndreas Sandberg
Add an option, --checker/-c, to style.py that selects individual style checkers to apply. When this option isn't specified, the script defaults to all available style checkers. The option may be specified multiple times to run multiple style checkers. The option, --fix/-f, can be specified to automatically fix style violations. Change-Id: Id7597fba6b65cecfa17a88b1c87c8a4c8315af59 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Hansson <andreas.hansson@arm.com>
2016-11-25util: git pre-commit hook to check staged filesRekai Gonzalez Alberquilla
This patch updates the git-pre-commit hook to check the files as they will be after the commit, instead of as they are currently, this way we prevent the undesired situation: - unstylish modification of a file - stage said file for commit - try to commit and fail due to style - fix style, forgetting staging changes - try to commit and fail, as although the changes staged are not styly, the current content of the file is. Change-Id: I5cc3f783375d9e4162e310e176103ebbf0a59023 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> [andreas.sandberg@arm.com: Rebased ontop of latest gem5]
2016-11-17tests, ruby: Move rubytests from ALPHA (linux) to NULL (none)Andreas Hansson
This patch avoids compiling ALPHA six times as part of running 'util/regress', and instead relis on NULL with different protocols to run the rubytest. All we need is the memory system, so there is really no need to compile the ISA over and over again. The one downside is the removal of running 'hello' for the variuos ALPHA and protocol combinations, but if this is a concern we should rather beef up the synthetic tests for the variuos protocols. --HG-- rename : build_opts/NULL => build_opts/NULL_MESI_Two_Level rename : build_opts/NULL => build_opts/NULL_MOESI_CMP_directory rename : build_opts/NULL => build_opts/NULL_MOESI_CMP_token rename : build_opts/NULL => build_opts/NULL_MOESI_hammer rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/config.ini => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MESI_Two_Level/config.ini rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/simerr => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MESI_Two_Level/simerr rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/simout => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MESI_Two_Level/simout rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/stats.txt => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MESI_Two_Level/stats.txt rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MOESI_CMP_directory/config.ini rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simerr => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MOESI_CMP_directory/simerr rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MOESI_CMP_directory/simout rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MOESI_CMP_directory/stats.txt rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/config.ini => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MOESI_CMP_token/config.ini rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simerr => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MOESI_CMP_token/simerr rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simout => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MOESI_CMP_token/simout rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/stats.txt => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MOESI_CMP_token/stats.txt rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MOESI_hammer/config.ini rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simerr => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MOESI_hammer/simerr rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MOESI_hammer/simout rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MOESI_hammer/stats.txt rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/config.ini rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/simerr => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/simerr rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/simout => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/simout rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt => tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/stats.txt
2016-10-26dev: Add m5 op to toggle synchronization for dist-gem5.Michael LeBeane
This patch adds the ability for an application to request dist-gem5 to begin/ end synchronization using an m5 op. When toggling on sync, all nodes agree on the next sync point based on the maximum of all nodes' ticks. CPUs are suspended until the sync point to avoid sending network messages until sync has been enabled. Toggling off sync acts like a global execution barrier, where all CPUs are disabled until every node reaches the toggle off point. This avoids tricky situations such as one node hitting a toggle off followed by a toggle on before the other nodes hit the first toggle off.
2016-10-15arm: Fix for ARM's Streamline conversion scriptShawn Rosti
tracked down issue with ARM's version of gem5 using the "cluster" name. The public/github version of ARM Gem5 does not use the "cluster" naming mechanism. Signed-off-by: Dam Sunwoo <dam.sunwoo@arm.com> Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2016-08-03style: Make the style fixers safeJason Lowe-Power
Adds a wrapper to the fix functions of the verifiers. This wrapper first copies the original file to a backup file, then performs the fix. If an error occurs, the backup file is used to restore the original file. Also fixed a line-length error in verifiers.py
2016-08-02arm: bank GIC registers per CPUCurtis Dunham
Updated according to GICv2 documentation. Change-Id: I5d926d1abf665eecc43ff0f7d6e561e1ee1c390a Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-07-21cpu: Add SMT support to MinorCPUMitch Hayenga
This patch adds SMT support to the MinorCPU. Currently RoundRobin or Random thread scheduling are supported. Change-Id: I91faf39ff881af5918cca05051829fc6261f20e3
2016-07-01misc: merge with sytle checker fixJason Lowe-Power
Oops.
2016-07-01misc: SystemC Elastic Trace Player Example.Matthias Jung
This patch adds an example configuration for elastic trace playing into the SystemC world, similar to the already existing traffic generator example in /util/tlm. Committed by Jason Lowe-Power <jason@lowepower.com>
2016-07-01misc: fix a compile error due to incompability with SystemC 2.3.1Christian Menard
This patch fixes an ambigous call compile error Committed by Jason Lowe-Power <jason@lowepower.com>
2016-07-01style: Fix incorrect references style verifiersAndreas Sandberg
The style checker for spacing around control statements (ControlSpace) and the whitespace checker (Whitespace) didn't refer to some of their configuration variables correctly. This changeset fixes those issues. Reported-by: Jason Lowe-Power <power.jg@gmail.com> --HG-- extra : amend_source : 05d82d27d4c42aacd78b514d3ca35ca5744164bb
2016-07-01misc: Separate stats file for SystemC-gem5 co-simulationAbdul Mutaal Ahmad
In previous versions of systemC-gem5 coupling statistics were not updated for the systemc-gem5 simulation. systemC-gem5 simulation only need the previously built config.ini file and normal gem5 simulation has to be run once to generate config.ini file. Thus stats.txt inside the m5out folder is redundant for systemC-gem5 simulation. A new stats file is now generated with the all the statistics for systemC-gem5 simulation. This will also resolve the stats issue in tlm-sysmtemC simulation. Committed by Jason Lowe-Power <jason@lowepower.com>
2016-06-20style: catch trailing white spaces in make and dts filesGabor Dozsa
Change-Id: I2a4f1893919660e51599902b972a6f3f5717e305 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-06-08dist, dev: Fixed the packet ordering in etherswitchMohammad Alian
This patch fixes the order that packets gets pushed into the output fifo of etherswitch. If two packets arrive at the same tick to the etherswitch, we sort and push them based on their source port id. In dist-gem5 simulations, if there is no ordering inforced while two packets arrive at the same tick, it can lead to non-deterministic simulations Committed by Jason Lowe-Power <power.jg@gmail.com>
2016-06-02style: remove extra newline from white space verifier fix methodGabor Dozsa
Change-Id: I7bce7d1cb04efe20d31445eb67ea5ffd2a4a41f4 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-06-02style: respect per verifier ignores for git commitGabor Dozsa
Change-Id: Id00379bdb17594e627ee49c077fb75f499ea550e Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-06-02style: Move the last bits of file_types.py to the style packageAndreas Sandberg
The commit that refactored the style checkers into a new Python package (style: Refactor the style checker as a Python package) accidentally left a fragment of file_types.py in the old location (util/style.py). This was caused by a race between the commit that moved the file and Nate's commit that added a copyright header to the file. This commit moves the last fragment (the copyright header) and removes the old file. Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> --HG-- extra : amend_source : 946f1f6fee034ae79bd50ea7dfc3299a60f070c0
2016-04-28style: ignore test data in style checksCurtis Dunham
Change-Id: If797eaf3842b5c1604942bb60f091800ee814a2a Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-04-28style: respect ignores for git commitCurtis Dunham
Previously it ignored the ignores for git but not Mercurial. Change-Id: I178fe879ebd268e863063eb9e30ec87e8ac8faec Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-04-28style: improve compatibility with old git versionsCurtis Dunham
Older versions of git need the '=' to connect --diff-filter to its argument. Change-Id: Ic62057567db061684be88a7c2d80a6a5d4c11dcf
2016-04-28style: Don't include diff context in git style hookAndreas Sandberg
The git style hook currently includes a few lines of diff context when determining changed regions. This is undesirable as this triggers false positives when modifying existing files with a lot of style violations. This change sets the amount of context to 0, which is the default value when requesting staged regions from the git helper. Change-Id: Ibe03123e329ea0241281e104183a68d6c495b190 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nathanael Premillieu <nathanael.premillieu@arm.com>
2016-04-18style: Fix Python 2.6 compatibilityAndreas Sandberg
The style checker code needs to disable autojunk when diffing source files using Python's difflib. Support for this was only introduced in Python 2.7, which leads to a TypeError exception on older Python version. This changeset adds a fallback mechanism for old Python versions.
2016-04-15misc: Bugfix in TLM memInhibit CommandAbdul Mutaal Ahmad
memInhibitAsserted() has been removed from packet.hh. This change has been reflected in TLM based SystemC memory. This patch also adds a number of panics asserting the SystemC memory only sees requests it expects. Committed by Jason Lowe-Power <power.jg@gmail.com>
2016-04-14dist: config file for distributed switchMohammad Alian
Distributed gem5 is the result of the convergence effort between multi-gem5 and pd-gem5. It relies on the base multi-gem5 infrastructure for packet forwarding, synchronisation and checkpointing but combines those with the elaborated network switch model from pd-gem5.
2016-04-07mem: Add Program Counter to MemTraceProbeVictor Garcia
2016-03-30arm: Clean up m5ops assembly libraryAndreas Sandberg
The m5ops assembly library contains a lot of repetitive code. This changeset adds two macros, FOREACH_M5OP and FOREACH_M5_ANNOTATION, to m5ops.h that simplify architecture-specific implementations. The ARM and ARMv8 m5op implementations have been updated to use the new macros. Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
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