summaryrefslogtreecommitdiff
path: root/arch/mips/isa/formats/int.isa
blob: a47844bee43163cc99fc88aca9fe4f7142c71c07 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
// -*- mode:c++ -*-

////////////////////////////////////////////////////////////////////
//
// Integer operate instructions
//

//Outputs to decoder.hh
output header {{
#include <iostream>
    using namespace std;
        /**
         * Base class for integer operations.
         */
        class IntOp : public MipsStaticInst
        {
                protected:

                /// Constructor
                IntOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
                                MipsStaticInst(mnem, _machInst, __opClass)
                {
                }

                std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
        };

        class IntImmOp : public MipsStaticInst
        {
                protected:

                int32_t imm;

                /// Constructor
                IntImmOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
                                MipsStaticInst(mnem, _machInst, __opClass),imm(INTIMM)
                {
                    //If Bit 15 is 1 then Sign Extend
                    int32_t temp = imm & 0x00008000;

                    if (temp > 0 && mnemonic != "lui") {
                        imm |= 0xFFFF0000;
                    }
                }

                std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;


        };

}};

//Outputs to decoder.cc
output decoder {{
        std::string IntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
        {
            std::stringstream ss;

            ccprintf(ss, "%-10s ", mnemonic);

            // just print the first dest... if there's a second one,
            // it's generally implicit
            if (_numDestRegs > 0) {
                printReg(ss, _destRegIdx[0]);
            }

            ss << ",";

            // just print the first two source regs... if there's
            // a third one, it's a read-modify-write dest (Rc),
            // e.g. for CMOVxx
            if (_numSrcRegs > 0) {
                printReg(ss, _srcRegIdx[0]);
            }

            if (_numSrcRegs > 1) {
                ss << ",";
                printReg(ss, _srcRegIdx[1]);
            }

            return ss.str();
        }

        std::string IntImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
        {
            std::stringstream ss;

            ccprintf(ss, "%-10s ", mnemonic);

            if (_numDestRegs > 0) {
                printReg(ss, _destRegIdx[0]);
            }

            ss << ",";

            if (_numSrcRegs > 0) {
                printReg(ss, _srcRegIdx[0]);
                ss << ",";
            }

            if( mnemonic == "lui")
                ccprintf(ss, "%08p ", imm);
            else
                ss << (int) imm;

            return ss.str();
        }

}};

//Used by decoder.isa
def format IntOp(code, *opt_flags) {{
        orig_code = code
        cblk = CodeBlock(code)

        # Figure out if we are creating a IntImmOp or a IntOp
        # by looking at the instruction name
        iop = InstObjParams(name, Name, 'IntOp', cblk, opt_flags)
        strlen = len(name)
        if name[strlen-1] == 'i' or name[strlen-2:] == 'iu':
            iop = InstObjParams(name, Name, 'IntImmOp', cblk, opt_flags)

        header_output = BasicDeclare.subst(iop)
        decoder_output = BasicConstructor.subst(iop)
        decode_block = OperateNopCheckDecode.subst(iop)
        exec_output = BasicExecute.subst(iop)
}};