1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
|
// Todo:
// Add a couple of the branch fields to DynInst. Figure out where DynInst
// should try to compute the target of a PC-relative branch. Try to avoid
// having so many returns within the code.
// Fix up squashing too, as it's too
// dependent upon the iew stage continually telling it to squash.
#ifndef __SIMPLE_DECODE_HH__
#define __SIMPLE_DECODE_HH__
#include <queue>
//Will want to include: time buffer, structs,
#include "base/timebuf.hh"
#include "cpu/beta_cpu/comm.hh"
using namespace std;
template<class Impl>
class SimpleDecode
{
private:
// Typedefs from the Impl.
typedef typename Impl::ISA ISA;
typedef typename Impl::DynInst DynInst;
typedef typename Impl::FullCPU FullCPU;
typedef typename Impl::Params Params;
typedef typename Impl::FetchStruct FetchStruct;
typedef typename Impl::DecodeStruct DecodeStruct;
typedef typename Impl::TimeStruct TimeStruct;
// Typedefs from the ISA.
typedef typename ISA::Addr Addr;
public:
// The only time decode will become blocked is if dispatch becomes
// blocked, which means IQ or ROB is probably full.
enum Status {
Running,
Idle,
Squashing,
Blocked,
Unblocking
};
private:
// May eventually need statuses on a per thread basis.
Status _status;
public:
SimpleDecode(Params ¶ms);
void setCPU(FullCPU *cpu_ptr);
void setTimeBuffer(TimeBuffer<TimeStruct> *tb_ptr);
void setDecodeQueue(TimeBuffer<DecodeStruct> *dq_ptr);
void setFetchQueue(TimeBuffer<FetchStruct> *fq_ptr);
void tick();
void decode();
// Might want to make squash a friend function.
void squash();
private:
void block();
inline void unblock();
void squash(DynInst *inst);
// Interfaces to objects outside of decode.
/** CPU interface. */
FullCPU *cpu;
/** Time buffer interface. */
TimeBuffer<TimeStruct> *timeBuffer;
/** Wire to get rename's output from backwards time buffer. */
typename TimeBuffer<TimeStruct>::wire fromRename;
/** Wire to get iew's information from backwards time buffer. */
typename TimeBuffer<TimeStruct>::wire fromIEW;
/** Wire to get commit's information from backwards time buffer. */
typename TimeBuffer<TimeStruct>::wire fromCommit;
/** Wire to write information heading to previous stages. */
// Might not be the best name as not only fetch will read it.
typename TimeBuffer<TimeStruct>::wire toFetch;
/** Decode instruction queue. */
TimeBuffer<DecodeStruct> *decodeQueue;
/** Wire used to write any information heading to rename. */
typename TimeBuffer<DecodeStruct>::wire toRename;
/** Fetch instruction queue interface. */
TimeBuffer<FetchStruct> *fetchQueue;
/** Wire to get fetch's output from fetch queue. */
typename TimeBuffer<FetchStruct>::wire fromFetch;
/** Skid buffer between fetch and decode. */
queue<FetchStruct> skidBuffer;
private:
//Consider making these unsigned to avoid any confusion.
/** Rename to decode delay, in ticks. */
unsigned renameToDecodeDelay;
/** IEW to decode delay, in ticks. */
unsigned iewToDecodeDelay;
/** Commit to decode delay, in ticks. */
unsigned commitToDecodeDelay;
/** Fetch to decode delay, in ticks. */
unsigned fetchToDecodeDelay;
/** The width of decode, in instructions. */
unsigned decodeWidth;
};
#endif // __SIMPLE_DECODE_HH__
|
