summaryrefslogtreecommitdiff
path: root/cpu/trace/reader/m5_reader.cc
blob: a1ada38a2b4852df989fbc5147e1a047636f6021 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
/*
 * Copyright (c) 2003-2004 The Regents of The University of Michigan
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @file
 * Declaration of a memory trace reader for a M5 memory trace.
 */

#include "cpu/trace/reader/m5_reader.hh"
#include "mem/trace/m5_format.hh"
#include "mem/mem_cmd.hh"
#include "sim/builder.hh"

using namespace std;

M5Reader::M5Reader(const string &name, const string &filename)
    : MemTraceReader(name)
{
    traceFile.open(filename.c_str(), ios::binary);
}

Tick
M5Reader::getNextReq(MemReqPtr &req)
{
    M5Format ref;

    MemReqPtr tmp_req;
    // Need to read EOF char before eof() will return true.
    traceFile.read((char*) &ref, sizeof(ref));
    if (!traceFile.eof()) {
        //traceFile.read((char*) &ref, sizeof(ref));
        int gcount = traceFile.gcount();
        assert(gcount != 0 || traceFile.eof());
        assert(gcount == sizeof(ref));
        assert(ref.cmd < 12);
        tmp_req = new MemReq();
        tmp_req->paddr = ref.paddr;
        tmp_req->asid = ref.asid;
        // Assume asid == thread_num
        tmp_req->thread_num = ref.asid;
        tmp_req->cmd = (MemCmdEnum)ref.cmd;
        tmp_req->size = ref.size;
        tmp_req->dest = ref.dest;
    } else {
        ref.cycle = 0;
    }
    req = tmp_req;
    return ref.cycle;
}

BEGIN_DECLARE_SIM_OBJECT_PARAMS(M5Reader)

    Param<string> filename;

END_DECLARE_SIM_OBJECT_PARAMS(M5Reader)


BEGIN_INIT_SIM_OBJECT_PARAMS(M5Reader)

    INIT_PARAM(filename, "trace file")

END_INIT_SIM_OBJECT_PARAMS(M5Reader)


CREATE_SIM_OBJECT(M5Reader)
{
    return new M5Reader(getInstanceName(), filename);
}

REGISTER_SIM_OBJECT("M5Reader", M5Reader)