1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
|
/*
* Copyright (c) 2002-2005 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Nathan Binkert
* Steve Reinhardt
*/
#ifndef __ARCH_ALPHA_PAGETABLE_H__
#define __ARCH_ALPHA_PAGETABLE_H__
#include "arch/alpha/isa_traits.hh"
#include "arch/alpha/utility.hh"
namespace AlphaISA {
struct VAddr
{
static const int ImplBits = 43;
static const Addr ImplMask = (ULL(1) << ImplBits) - 1;
static const Addr UnImplMask = ~ImplMask;
Addr addr;
VAddr(Addr a) : addr(a) {}
operator Addr() const { return addr; }
const VAddr &operator=(Addr a) { addr = a; return *this; }
Addr vpn() const { return (addr & ImplMask) >> PageShift; }
Addr page() const { return addr & PageMask; }
Addr offset() const { return addr & PageOffset; }
Addr level3() const
{ return PteAddr(addr >> PageShift); }
Addr level2() const
{ return PteAddr(addr >> (NPtePageShift + PageShift)); }
Addr level1() const
{ return PteAddr(addr >> (2 * NPtePageShift + PageShift)); }
};
struct PageTableEntry
{
PageTableEntry(uint64_t e) : entry(e) {}
uint64_t entry;
operator uint64_t() const { return entry; }
const PageTableEntry &operator=(uint64_t e) { entry = e; return *this; }
const PageTableEntry &operator=(const PageTableEntry &e)
{ entry = e.entry; return *this; }
Addr _pfn() const { return (entry >> 32) & 0xffffffff; }
Addr _sw() const { return (entry >> 16) & 0xffff; }
int _rsv0() const { return (entry >> 14) & 0x3; }
bool _uwe() const { return (entry >> 13) & 0x1; }
bool _kwe() const { return (entry >> 12) & 0x1; }
int _rsv1() const { return (entry >> 10) & 0x3; }
bool _ure() const { return (entry >> 9) & 0x1; }
bool _kre() const { return (entry >> 8) & 0x1; }
bool _nomb() const { return (entry >> 7) & 0x1; }
int _gh() const { return (entry >> 5) & 0x3; }
bool _asm_() const { return (entry >> 4) & 0x1; }
bool _foe() const { return (entry >> 3) & 0x1; }
bool _fow() const { return (entry >> 2) & 0x1; }
bool _for() const { return (entry >> 1) & 0x1; }
bool valid() const { return (entry >> 0) & 0x1; }
Addr paddr() const { return _pfn() << PageShift; }
};
// ITB/DTB table entry
struct TlbEntry
{
Addr tag; // virtual page number tag
Addr ppn; // physical page number
uint8_t xre; // read permissions - VMEM_PERM_* mask
uint8_t xwe; // write permissions - VMEM_PERM_* mask
uint8_t asn; // address space number
bool asma; // address space match
bool fonr; // fault on read
bool fonw; // fault on write
bool valid; // valid page table entry
//Construct an entry that maps to physical address addr.
TlbEntry(Addr _asn, Addr _vaddr, Addr _paddr)
{
VAddr vaddr(_vaddr);
VAddr paddr(_paddr);
tag = vaddr.vpn();
ppn = paddr.vpn();
xre = 15;
xwe = 15;
asn = _asn;
asma = false;
fonr = false;
fonw = false;
valid = true;
}
TlbEntry()
{}
void
updateVaddr(Addr new_vaddr)
{
VAddr vaddr(new_vaddr);
tag = vaddr.vpn();
}
Addr
pageStart()
{
return ppn << PageShift;
}
void serialize(std::ostream &os);
void unserialize(Checkpoint *cp, const std::string §ion);
};
} // namespace AlphaISA
#endif // __ARCH_ALPHA_PAGETABLE_H__
|
