summaryrefslogtreecommitdiff
path: root/src/arch/arm/isa/insts/swap.isa
blob: 29b5b444f56dbf6aa29c6b280d0a2339f0dba698 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
// -*- mode:c++ -*-

// Copyright (c) 2010 ARM Limited
// All rights reserved
//
// The license below extends only to copyright in the software and shall
// not be construed as granting a license to any other intellectual
// property including but not limited to intellectual property relating
// to a hardware implementation of the functionality of the software
// licensed hereunder.  You may use the software subject to the license
// terms below provided that you ensure that this notice is replicated
// unmodified and in its entirety in all distributions of the software,
// modified or unmodified, in source code or in binary form.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met: redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer;
// redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution;
// neither the name of the copyright holders nor the names of its
// contributors may be used to endorse or promote products derived from
// this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// Authors: Gabe Black

let {{

    header_output = decoder_output = exec_output = ""

    (newHeader,
     newDecoder,
     newExec) = SwapBase("swp", "Swp", "EA = Base;",
                         "Mem = cSwap(Op1.uw, ((CPSR)Cpsr).e);",
                         "Dest = cSwap((uint32_t)memData, ((CPSR)Cpsr).e);",
                         ["Request::MEM_SWAP",
                          "ArmISA::TLB::AlignWord",
                          "ArmISA::TLB::MustBeOne"], [])
    header_output += newHeader
    decoder_output += newDecoder
    exec_output += newExec

    (newHeader,
     newDecoder,
     newExec) = SwapBase("swpb", "Swpb", "EA = Base;",
                         "Mem.ub = cSwap(Op1.ub, ((CPSR)Cpsr).e);",
                         "Dest.ub = cSwap((uint8_t)memData, ((CPSR)Cpsr).e);",
                         ["Request::MEM_SWAP",
                          "ArmISA::TLB::AlignByte",
                          "ArmISA::TLB::MustBeOne"], [])
    header_output += newHeader
    decoder_output += newDecoder
    exec_output += newExec
}};