summaryrefslogtreecommitdiff
path: root/src/arch/x86/isa/microops/specop.isa
blob: 83fb97dec5f8b80a253dfd8fb2fa0376e003988e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
// All rights reserved.
//
// Redistribution and use of this software in source and binary forms,
// with or without modification, are permitted provided that the
// following conditions are met:
//
// The software must be used only for Non-Commercial Use which means any
// use which is NOT directed to receiving any direct monetary
// compensation for, or commercial advantage from such use.  Illustrative
// examples of non-commercial use are academic research, personal study,
// teaching, education and corporate research & development.
// Illustrative examples of commercial use are distributing products for
// commercial advantage and providing services using the software for
// commercial advantage.
//
// If you wish to use this software or functionality therein that may be
// covered by patents for commercial use, please contact:
//     Director of Intellectual Property Licensing
//     Office of Strategy and Technology
//     Hewlett-Packard Company
//     1501 Page Mill Road
//     Palo Alto, California  94304
//
// Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.  Redistributions
// in binary form must reproduce the above copyright notice, this list of
// conditions and the following disclaimer in the documentation and/or
// other materials provided with the distribution.  Neither the name of
// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
// contributors may be used to endorse or promote products derived from
// this software without specific prior written permission.  No right of
// sublicense is granted herewith.  Derivatives of the software and
// output created using the software may be prepared, but only for
// Non-Commercial Uses.  Derivatives of the software may be shared with
// others provided: (i) the others agree to abide by the list of
// conditions herein which includes the Non-Commercial Use restrictions;
// and (ii) such Derivatives of the software include the above copyright
// notice to acknowledge the contribution from this software where
// applicable, this list of conditions and the disclaimer below.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// Authors: Gabe Black

//////////////////////////////////////////////////////////////////////////
//
// Fault Microop
//
//////////////////////////////////////////////////////////////////////////

output header {{
    class MicroFaultBase : public X86ISA::X86MicroopBase
    {
      protected:
        Fault fault;
        uint8_t cc;

      public:
        MicroFaultBase(ExtMachInst _machInst, const char * instMnem,
                bool isMicro, bool isDelayed, bool isFirst, bool isLast,
                Fault _fault, uint8_t _cc);

        MicroFaultBase(ExtMachInst _machInst, const char * instMnem,
                Fault _fault, uint8_t _cc);

        std::string generateDisassembly(Addr pc,
                const SymbolTable *symtab) const;
    };

    class MicroHalt : public X86ISA::X86MicroopBase
    {
      public:
        MicroHalt(ExtMachInst _machInst, const char * instMnem,
                bool isMicro, bool isDelayed, bool isFirst, bool isLast) :
            X86MicroopBase(_machInst, "halt", instMnem,
                    isMicro, isDelayed, isFirst, isLast, No_OpClass)
        {
        }

        MicroHalt(ExtMachInst _machInst, const char * instMnem) :
            X86MicroopBase(_machInst, "halt", instMnem,
                    false, false, false, false, No_OpClass)
        {
        }

        %(BasicExecDeclare)s

        std::string generateDisassembly(Addr pc,
                const SymbolTable *symtab) const;
    };
}};

def template MicroFaultDeclare {{
    class %(class_name)s : public %(base_class)s
    {
      private:
        void buildMe();
      public:
        %(class_name)s(ExtMachInst _machInst, const char * instMnem,
                bool isMicro, bool isDelayed, bool isFirst, bool isLast,
                Fault _fault, uint8_t _cc);

        %(class_name)s(ExtMachInst _machInst, const char * instMnem,
                Fault _fault, uint8_t _cc);

        %(BasicExecDeclare)s
    };
}};

def template MicroFaultExecute {{
        Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
                Trace::InstRecord *traceData) const
        {
            %(op_decl)s;
            %(op_rd)s;
            if (%(cond_test)s) {
                //Return the fault we were constructed with
                return fault;
            } else {
                return NoFault;
            }
        }
}};

output exec {{
    Fault
    MicroHalt::execute(%(CPU_exec_context)s *xc,
            Trace::InstRecord * traceData) const
    {
        xc->tcBase()->suspend();
        return NoFault;
    }
}};

output decoder {{
    inline MicroFaultBase::MicroFaultBase(
            ExtMachInst machInst, const char * instMnem,
            Fault _fault, uint8_t _cc) :
        X86MicroopBase(machInst, "fault", instMnem,
                false, false, false, false, No_OpClass),
        fault(_fault), cc(_cc)
    {
    }

    inline MicroFaultBase::MicroFaultBase(
            ExtMachInst machInst, const char * instMnem,
            bool isMicro, bool isDelayed, bool isFirst, bool isLast,
            Fault _fault, uint8_t _cc) :
        X86MicroopBase(machInst, "fault", instMnem,
                isMicro, isDelayed, isFirst, isLast, No_OpClass),
                fault(_fault), cc(_cc)
    {
    }
}};

def template MicroFaultConstructor {{

    inline void %(class_name)s::buildMe()
    {
        %(constructor)s;
    }

    inline %(class_name)s::%(class_name)s(
            ExtMachInst machInst, const char * instMnem,
            Fault _fault, uint8_t _cc) :
        %(base_class)s(machInst, instMnem, _fault, _cc)
    {
        buildMe();
    }

    inline %(class_name)s::%(class_name)s(
            ExtMachInst machInst, const char * instMnem,
            bool isMicro, bool isDelayed, bool isFirst, bool isLast,
            Fault _fault, uint8_t _cc) :
        %(base_class)s(machInst, instMnem,
                isMicro, isDelayed, isFirst, isLast, _fault, _cc)
    {
        buildMe();
    }
}};

output decoder {{
    std::string MicroFaultBase::generateDisassembly(Addr pc,
            const SymbolTable *symtab) const
    {
        std::stringstream response;

        printMnemonic(response, instMnem, mnemonic);
        if(fault)
            response << fault->name();
        else
            response << "No Fault";

        return response.str();
    }

    std::string MicroHalt::generateDisassembly(Addr pc,
            const SymbolTable *symtab) const
    {
        std::stringstream response;

        printMnemonic(response, instMnem, mnemonic);

        return response.str();
    }
}};

let {{
    class Fault(X86Microop):
        className = "MicroFault"
        def __init__(self, fault, flags=None):
            self.fault = fault
            if flags:
                if not isinstance(flags, (list, tuple)):
                    raise Exception, "flags must be a list or tuple of flags"
                self.cond = " | ".join(flags)
                self.className += "Flags"
            else:
                self.cond = "0"

        def getAllocator(self, *microFlags):
            allocator = '''new %(class_name)s(machInst, macrocodeBlock
                    %(flags)s, %(fault)s, %(cc)s)''' % {
                "class_name" : self.className,
                "flags" : self.microFlagsText(microFlags),
                "fault" : self.fault,
                "cc" : self.cond}
            return allocator

    iop = InstObjParams("fault", "MicroFaultFlags", "MicroFaultBase",
            {"code": "",
             "cond_test": "checkCondition(ccFlagBits, cc)"})
    exec_output = MicroFaultExecute.subst(iop)
    header_output = MicroFaultDeclare.subst(iop)
    decoder_output = MicroFaultConstructor.subst(iop)
    iop = InstObjParams("fault", "MicroFault", "MicroFaultBase",
            {"code": "",
             "cond_test": "true"})
    exec_output += MicroFaultExecute.subst(iop)
    header_output += MicroFaultDeclare.subst(iop)
    decoder_output += MicroFaultConstructor.subst(iop)
    microopClasses["fault"] = Fault

    class Halt(X86Microop):
        className = "MicroHalt"
        def __init__(self):
            pass

        def getAllocator(self, *microFlags):
            return "new MicroHalt(machInst, macrocodeBlock %s)" % \
                    self.microFlagsText(microFlags)

    microopClasses["halt"] = Halt
}};