1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
|
/*
* Copyright (c) 2007 MIPS Technologies, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Korey Sewell
*
*/
#ifndef __CPU_INORDER_PIPELINE_IMPL_HH__
#define __CPU_INORDER_PIPELINE_IMPL_HH__
#include <list>
#include <queue>
#include <vector>
#include "arch/isa_traits.hh"
#include "cpu/base.hh"
#include "params/InOrderCPU.hh"
class InOrderDynInst;
/* This Namespace contains constants, typedefs, functions and
* objects specific to the Pipeline Implementation.
*/
namespace ThePipeline {
// Pipeline Constants
const unsigned NumStages = 5;
const unsigned MaxThreads = 8;
const unsigned StageWidth = 1;
const unsigned BackEndStartStage = 2;
// Enumerated List of Resources The Pipeline Uses
enum ResourceList {
FetchSeq = 0,
ICache,
Decode,
BPred,
FetchBuff,
RegManager,
AGEN,
ExecUnit,
MDU,
DCache,
Grad,
FetchBuff2
};
// Expand this as necessary for your inter stage buffer sizes
static const unsigned interStageBuffSize[] = {
StageWidth, /* Stage 0 - 1 */
StageWidth, /* Stage 1 - 2 */
StageWidth, /* Stage 2 - 3 */
StageWidth, /* Stage 3 - 4 */
StageWidth, /* Stage 4 - 5 */
StageWidth, /* Stage 5 - 6 */
StageWidth, /* Stage 6 - 7 */
StageWidth, /* Stage 7 - 8 */
StageWidth /* Stage 8 - 9 */
};
typedef InOrderCPUParams Params;
typedef RefCountingPtr<InOrderDynInst> DynInstPtr;
//////////////////////////
// RESOURCE SCHEDULING
//////////////////////////
struct ScheduleEntry {
ScheduleEntry(int stage_num, int _priority, int res_num, int _cmd = 0,
int _idx = 0) :
stageNum(stage_num), resNum(res_num), cmd(_cmd),
idx(_idx), priority(_priority)
{ }
virtual ~ScheduleEntry(){}
// Stage number to perform this service.
int stageNum;
// Resource ID to access
int resNum;
// See specific resource for meaning
unsigned cmd;
// See specific resource for meaning
unsigned idx;
// Some Resources May Need Priority?
int priority;
};
struct entryCompare {
bool operator()(const ScheduleEntry* lhs, const ScheduleEntry* rhs) const
{
// Prioritize first by stage number that the resource is needed
if (lhs->stageNum > rhs->stageNum) {
return true;
} else if (lhs->stageNum == rhs->stageNum) {
if (lhs->priority > rhs->priority) {
return true;
} else {
return false;
}
} else {
return false;
}
}
};
typedef std::priority_queue<ScheduleEntry*, std::vector<ScheduleEntry*>,
entryCompare> ResSchedule;
void createFrontEndSchedule(DynInstPtr &inst);
bool createBackEndSchedule(DynInstPtr &inst);
int getNextPriority(DynInstPtr &inst, int stage_num);
class InstStage {
private:
int nextTaskPriority;
int stageNum;
ResSchedule *instSched;
public:
InstStage(DynInstPtr inst, int stage_num);
void needs(int unit, int request) {
instSched->push( new ScheduleEntry(
stageNum, nextTaskPriority++, unit, request
));
}
void needs(int unit, int request, int param) {
instSched->push( new ScheduleEntry(
stageNum, nextTaskPriority++, unit, request, param
));
}
};
};
#endif
|
