summaryrefslogtreecommitdiff
path: root/src/dev/x86/i82094aa.hh
blob: 60ef270126cbd3e130a9f15dbc03a0973632b891 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
/*
 * Copyright (c) 2008 The Regents of The University of Michigan
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Authors: Gabe Black
 */

#ifndef __DEV_X86_I82094AA_HH__
#define __DEV_X86_I82094AA_HH__

#include <map>

#include "base/bitunion.hh"
#include "base/range_map.hh"
#include "dev/x86/intdev.hh"
#include "dev/io_device.hh"
#include "params/I82094AA.hh"

namespace X86ISA
{

class I8259;
class Interrupts;

class I82094AA : public PioDevice, public IntDev
{
  public:
    BitUnion64(RedirTableEntry)
        Bitfield<63, 32> topDW;
        Bitfield<55, 32> topReserved;
        Bitfield<31, 0> bottomDW;
        Bitfield<31, 17> bottomReserved;
        Bitfield<63, 56> dest;
        Bitfield<16> mask;
        Bitfield<15> trigger;
        Bitfield<14> remoteIRR;
        Bitfield<13> polarity;
        Bitfield<12> deliveryStatus;
        Bitfield<11> destMode;
        Bitfield<10, 8> deliveryMode;
        Bitfield<7, 0> vector;
    EndBitUnion(RedirTableEntry)

  protected:
    Tick latency;
    Addr pioAddr;

    I8259 * extIntPic;

    uint8_t regSel;
    uint8_t initialApicId;
    uint8_t id;
    uint8_t arbId;

    uint64_t lowestPriorityOffset;

    static const uint8_t TableSize = 24;
    // This implementation is based on version 0x11, but 0x14 avoids having
    // to deal with the arbitration and APIC bus guck.
    static const uint8_t APICVersion = 0x14;

    RedirTableEntry redirTable[TableSize];
    bool pinStates[TableSize];

  public:
    typedef I82094AAParams Params;

    const Params *
    params() const
    {
        return dynamic_cast<const Params *>(_params);
    }

    I82094AA(Params *p);

    void init();

    Tick read(PacketPtr pkt);
    Tick write(PacketPtr pkt);

    AddrRangeList getAddrRanges()
    {
        AddrRangeList ranges;
        ranges.push_back(RangeEx(pioAddr, pioAddr + 4));
        ranges.push_back(RangeEx(pioAddr + 16, pioAddr + 20));
        return ranges;
    }

    AddrRangeList getIntAddrRange()
    {
        AddrRangeList ranges;
        ranges.push_back(RangeEx(x86InterruptAddress(initialApicId, 0),
                                 x86InterruptAddress(initialApicId, 0) +
                                 PhysAddrAPICRangeSize));
        return ranges;
    }

    void writeReg(uint8_t offset, uint32_t value);
    uint32_t readReg(uint8_t offset);

    Port *getPort(const std::string &if_name, int idx = -1)
    {
        if (if_name == "int_master")
            return intPort;
        return PioDevice::getPort(if_name, idx);
    }

    void signalInterrupt(int line);
    void raiseInterruptPin(int number);
    void lowerInterruptPin(int number);

    virtual void serialize(std::ostream &os);
    virtual void unserialize(Checkpoint *cp, const std::string &section);
};

} // namespace X86ISA

#endif //__DEV_X86_SOUTH_BRIDGE_I8254_HH__